Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34522 )
Change subject: soc/intel/cannonlake: Set PCH Thermal Sensor configuration for S0ix ......................................................................
soc/intel/cannonlake: Set PCH Thermal Sensor configuration for S0ix
Set PCH thermal sensor for dynamic thermal shutdown when S0ix is enabled.
BUG=None BRANCH=None TEST=Verified Thermal Device (B0: D18: F0) TSPM offset 0x1c [LTT (8:0)] value is 0xFE.
Change-Id: I50796bcf9e0d5a65cd7ba63fedd932967c4c1ff9 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/soc/intel/cannonlake/finalize.c 1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/34522/1
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c index 6083cab..eed042e 100644 --- a/src/soc/intel/cannonlake/finalize.c +++ b/src/soc/intel/cannonlake/finalize.c @@ -33,6 +33,7 @@ #include <soc/smbus.h> #include <soc/systemagent.h> #include <stdlib.h> +#include <soc/intel/common/pch/include/thermal.h>
#include "chip.h"
@@ -62,6 +63,16 @@ uint8_t reg8;
tco_lockdown(); + + /* + * Set low maximum temp threshold value used for dynamic thermal sensor + * shutdown consideration. + * + * If Dynamic Thermal Shutdown is enabled then PMC logic shuts down the + * thermal sensor when CPU is in a C-state and DTS Temp <= LTT. + */ + pch_thermal_configuration(); + /* * Disable ACPI PM timer based on dt policy *