Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38016 )
Change subject: Documentation/superio: add generic PNP device documentation ......................................................................
Patch Set 1:
(5 comments)
https://review.coreboot.org/c/coreboot/+/38016/1/Documentation/superio/commo... File Documentation/superio/common/pnp.md:
https://review.coreboot.org/c/coreboot/+/38016/1/Documentation/superio/commo... PS1, Line 27: ### vitual logical device numbers vital or virtual :)
https://review.coreboot.org/c/coreboot/+/38016/1/Documentation/superio/commo... PS1, Line 33: coreboot encodes the enable bit number and by that the virtual LDN part in the lower 3 bits of the higher byte of the LDN number. This is true, while confusing. I think we should do a somewhat major redesign on the devicetree.cb, possibly taking advantage of override trees to reduce the amount of code duplication we have for super-ios.
https://review.coreboot.org/c/coreboot/+/38016/1/Documentation/superio/commo... PS1, Line 55: The first register selects the IRQ number from 1 to 15 and 0 deactivated the corresponding IRQ. The second register selects the IRQ type (level or edge) and IRQ level (high or low). IRQ type is not really something configurable? HOST expects edge triggered SERIRQ?
The topic on IRQ routing and PIC/IOAPIC/MSI/MSI-X would be a completely separate document to cover.
https://review.coreboot.org/c/coreboot/+/38016/1/Documentation/superio/commo... PS1, Line 60: In the continous SERIRQ mode the host continuously sends IRQ frame starts and the devices signal and devices signal their IRQ request by pulling low the SERIRQ line at the right time. extra 'and devices signal'
https://review.coreboot.org/c/coreboot/+/38016/1/Documentation/superio/commo... PS1, Line 67: Those are only used for legacy devices like parallel printer ports or floppy disk controllers. Support for DRQ on the host side may have been dropped with recent chipsets.