[coreboot-gerrit] Change in coreboot[master]: cpu/intel/*init: Remove obsolete cache enable

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49383 )

Change subject: cpu/intel/*init: Remove obsolete cache enable
......................................................................

cpu/intel/*init: Remove obsolete cache enable

The caches have already been enabled during MP-init,
so these function calls are redundant. Remove them.

Change-Id: Ia9be1a3388d8e7c73c35a1c68b3dd5bc488658c2
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49383
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/cpu/intel/model_1067x/model_1067x_init.c
M src/cpu/intel/model_106cx/model_106cx_init.c
M src/cpu/intel/model_2065x/model_2065x_init.c
M src/cpu/intel/model_206ax/model_206ax_init.c
4 files changed, 0 insertions(+), 12 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index c130894..3e4de1f 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -264,9 +264,6 @@
    /* Test for TM2 only if EIST is available. */
    const char tm2 = eist && (cpuid1.ecx & (1 << 8));

-	/* Turn on caching if we haven't already */
-	x86_enable_cache();
-
    /* Print processor name */
    fill_processor_name(processor_name);
    printk(BIOS_INFO, "CPU: %s.\n", processor_name);
diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index 8c462f1..278d8de 100644
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -63,9 +63,6 @@
 {
    char processor_name[49];

-	/* Turn on caching if we haven't already */
-	x86_enable_cache();
-
    /* Print processor name */
    fill_processor_name(processor_name);
    printk(BIOS_INFO, "CPU: %s.\n", processor_name);
diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c
index 88e42a5..f1a2150 100644
--- a/src/cpu/intel/model_2065x/model_2065x_init.c
+++ b/src/cpu/intel/model_2065x/model_2065x_init.c
@@ -185,9 +185,6 @@
 {
    char processor_name[49];

-	/* Turn on caching if we haven't already */
-	x86_enable_cache();
-
    /* Clear out pending MCEs */
    configure_mca();

diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index b08a86f..31099fd 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -425,9 +425,6 @@
 static void model_206ax_init(struct device *cpu)
 {

-	/* Turn on caching if we haven't already */
-	x86_enable_cache();
-
    /* Clear out pending MCEs */
    configure_mca();