Patrick Rudolph has uploaded a new change for review. ( https://review.coreboot.org/19546 )
Change subject: sb/intel/bd82x6x/bootblock: Use register name ......................................................................
sb/intel/bd82x6x/bootblock: Use register name
Use defines instead of magic values.
No functional change.
Change-Id: Idc90f254d7713f96a6e8b0389e34d860f461d9d1 Signed-off-by: Patrick Rudolph siro@das-labor.org --- M src/southbridge/intel/bd82x6x/bootblock.c 1 file changed, 4 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/19546/1
diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c index 103b6a8..8541903 100644 --- a/src/southbridge/intel/bd82x6x/bootblock.c +++ b/src/southbridge/intel/bd82x6x/bootblock.c @@ -34,19 +34,17 @@ static void enable_spi_prefetch(void) { u8 reg8; - pci_devfn_t dev; + pci_devfn_t dev = PCH_LPC_DEV;
- dev = PCI_DEV(0, 0x1f, 0); - - reg8 = pci_read_config8(dev, 0xdc); + reg8 = pci_read_config8(dev, BIOS_CNTL); reg8 &= ~(3 << 2); reg8 |= (2 << 2); /* Prefetching and Caching Enabled */ - pci_write_config8(dev, 0xdc, reg8); + pci_write_config8(dev, BIOS_CNTL, reg8); }
static void enable_port80_on_lpc(void) { - pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); + pci_devfn_t dev = PCH_LPC_DEV;
/* Enable port 80 POST on LPC */ pci_write_config32(dev, RCBA, (uintptr_t)DEFAULT_RCBA | 1);