Attention is currently required from: Sridhar Siricilla, Tim Wawrzynczak, Patrick Rudolph. Hello Sridhar Siricilla,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/59360
to review the following change.
Change subject: soc/intel, soc/common: Add method to determine the cpu type mask ......................................................................
soc/intel, soc/common: Add method to determine the cpu type mask
The patch adds below functions: get_cpu_type_bitmask(): It returns the cpu type mask. set_cpu_type_bitmask(): It determines the cpu type (big or small) that is executing the function, and marks the bit location which is corresponds to the executing cpu's index if the cpu type is big.
Also, it calls the set_cpu_type_bitmask() from soc/alderlake/cpu.c
TEST=verified on Brya
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.corp-partner.google.com Change-Id: If4ceb24d9bb1e808750bf618c29b2b9ea6d4191b --- M src/soc/intel/alderlake/cpu.c M src/soc/intel/common/block/acpi/cpu_hybrid.c M src/soc/intel/common/block/include/intelblocks/acpi.h 3 files changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/59360/1
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index 94658c7..59f50f1 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -19,6 +19,7 @@ #include <intelblocks/cpulib.h> #include <intelblocks/mp_init.h> #include <intelblocks/msr.h> +#include <intelblocks/acpi.h> #include <soc/cpu.h> #include <soc/msr.h> #include <soc/pci_devs.h> @@ -87,6 +88,10 @@
/* Enable Turbo */ enable_turbo(); + + /* Set CPU Type bitmask */ + if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID)) + set_cpu_type_bitmask(); }
static void per_cpu_smm_trigger(void) diff --git a/src/soc/intel/common/block/acpi/cpu_hybrid.c b/src/soc/intel/common/block/acpi/cpu_hybrid.c index 83b9c47..4a46433 100644 --- a/src/soc/intel/common/block/acpi/cpu_hybrid.c +++ b/src/soc/intel/common/block/acpi/cpu_hybrid.c @@ -2,9 +2,29 @@ #include <intelblocks/acpi.h> #include <soc/cpu.h> #include <stdlib.h> +#include <cpu/x86/mp.h> +#include <smp/spinlock.h>
#define XPPC_PACKAGE_NAME "XCPC"
+DECLARE_SPIN_LOCK(cpu_lock); +static unsigned int global_cpu_type_bitmask; + +void set_cpu_type_bitmask(void) +{ + spin_lock(&cpu_lock); + + /* if cpu type is big, mark the bit location corresponds to the cpu index */ + if (get_cpu_type() == CPUID_CORE_TYPE_INTEL_CORE) + global_cpu_type_bitmask |= (1 << get_cpu_index()); + spin_unlock(&cpu_lock); +} + +uint32_t get_cpu_type_bitmask(void) +{ + return global_cpu_type_bitmask; +} + void core_fill_gnvs(struct global_nvs *gnvs) { uint16_t big_core_scal_factor, small_core_scal_factor; diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h index 516c66f..8a5b10e 100644 --- a/src/soc/intel/common/block/include/intelblocks/acpi.h +++ b/src/soc/intel/common/block/include/intelblocks/acpi.h @@ -9,6 +9,9 @@ #include <soc/pm.h> #include <stdint.h>
+#define CPUID_CORE_TYPE_INTEL_ATOM 0x20 +#define CPUID_CORE_TYPE_INTEL_CORE 0x40 + /* It generates ACPI code to set Nominal Frequency and Nominal Performance */ void acpi_write_xppc_method(int core_id);
@@ -116,4 +119,13 @@ /* Fill SSDT for SGX status, EPC base and length */ void sgx_fill_ssdt(void);
+/* + * It determins type (big or small) of cpu that is executing the function, and marks + * the bit location which is corresponds to executing cpu's index if the cpu type is big + */ +void set_cpu_type_bitmask(void); + +/* Returns CPU type mask */ +uint32_t get_cpu_type_bitmask(void); + #endif /* _SOC_INTEL_COMMON_BLOCK_ACPI_H_ */