Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34179 )
Change subject: soc/intel/cannonlake: Add GCFG method to GPIO ASL. ......................................................................
soc/intel/cannonlake: Add GCFG method to GPIO ASL.
The new method returns the address of a GPIO community's MISCCFG register.
Change-Id: I098ee08573eb4f8a45d9b5ae84f2d85ce525c9b8 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/cannonlake/acpi/gpio.asl 1 file changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/34179/1
diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl index 9df1cf7..71a11b1 100644 --- a/src/soc/intel/cannonlake/acpi/gpio.asl +++ b/src/soc/intel/cannonlake/acpi/gpio.asl @@ -107,3 +107,40 @@ Add (Local2, PAD_CFG_BASE, Local2) Return (Add (Local2, Multiply (Local1, 16))) } + +/* + * Get GPIO Community MISCCFG Address + * Arg0 - GPIO Community Number + */ +Method (GCFG, 1, NotSerialized) +{ + /* GPIO Community 0 */ + If (LEqual (Arg0, 0)) + { + Store (PID_GPIOCOM0, Local0) + } + /* GPIO Community 1 */ + If (LEqual (Arg0, 1)) + { + Store (PID_GPIOCOM1, Local0) + } + /* GPIO Community 2 */ + If (LEqual (Arg0, 2)) + { + Store (PID_GPIOCOM2, Local0) + } + /* GPIO Community 3 */ + If (LEqual (Arg0, 3)) + { + Store (PID_GPIOCOM3, Local0) + } + /* GPIO Community 4*/ + If (LEqual (Arg0, 4)) + { + Store (PID_GPIOCOM4, Local0) + } + + Store (PCRB (Local0), Local1) + Add (Local1, 16, Local1) + Return (Local1) +}