Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30894
Change subject: Drop unused dump_mem() ......................................................................
Drop unused dump_mem()
If needed, there are hexdump variants in lib/hexdump.c.
Change-Id: I2467d03f269007fea1bf830b213d4f11d2b552bf Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/amd/mahogany_fam10/romstage.c M src/mainboard/asus/m4a78-em/romstage.c M src/mainboard/asus/m4a785-m/romstage.c M src/mainboard/asus/m5a88-v/romstage.c M src/mainboard/gigabyte/ma785gm/romstage.c M src/mainboard/gigabyte/ma785gmt/romstage.c M src/mainboard/iei/kino-780am2-fam10/romstage.c M src/mainboard/jetway/pa78vm5/romstage.c M src/mainboard/supermicro/h8scm_fam10/romstage.c M src/northbridge/amd/amdfam10/debug.c M src/northbridge/amd/amdfam10/debug.h M src/northbridge/intel/e7505/debug.c M src/northbridge/intel/e7505/debug.h M src/northbridge/intel/i945/debug.c M src/northbridge/intel/i945/i945.h 15 files changed, 0 insertions(+), 58 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/30894/1
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index c9fc9ec..056f840 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -100,8 +100,6 @@
console_init();
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index 788907a..e93f2dd 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -100,8 +100,6 @@
console_init();
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index 5cc9707..1bf4e78 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -101,8 +101,6 @@
console_init();
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index 6b03ffd..5c36727 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -104,8 +104,6 @@ console_init(); printk(BIOS_DEBUG, "\n");
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c index 1bb3c64..9f77635 100644 --- a/src/mainboard/gigabyte/ma785gm/romstage.c +++ b/src/mainboard/gigabyte/ma785gm/romstage.c @@ -96,8 +96,6 @@ it8718f_disable_reboot(GPIO_DEV); console_init();
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index 11dd190..f608845 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -96,8 +96,6 @@ it8718f_disable_reboot(GPIO_DEV); console_init();
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index d42e90b..3167bf3 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -98,8 +98,6 @@
console_init();
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index 9c4183e..7737625 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -103,8 +103,6 @@
console_init();
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 8508189..db5147f 100644 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -110,8 +110,6 @@
console_init();
-// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist);
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c index 067c299..55a00e1 100644 --- a/src/northbridge/amd/amdfam10/debug.c +++ b/src/northbridge/amd/amdfam10/debug.c @@ -299,19 +299,6 @@ } }
-void dump_mem(u32 start, u32 end) -{ - u32 i; - printk(BIOS_DEBUG, "dump_mem:"); - for (i = start; i < end; i++) { - if ((i & 0xf) == 0) { - printk(BIOS_DEBUG, "\n%08x:", i); - } - printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i)); - } - printk(BIOS_DEBUG, "\n"); -} - #if IS_ENABLED(CONFIG_DIMM_DDR2) void print_tx(const char *strval, u32 val) { diff --git a/src/northbridge/amd/amdfam10/debug.h b/src/northbridge/amd/amdfam10/debug.h index a4ecfe9..a23303e 100644 --- a/src/northbridge/amd/amdfam10/debug.h +++ b/src/northbridge/amd/amdfam10/debug.h @@ -38,7 +38,6 @@ #endif
void dump_io_resources(u32 port); -void dump_mem(u32 start, u32 end);
void print_tx(const char *strval, u32 val); void print_t(const char *strval); diff --git a/src/northbridge/intel/e7505/debug.c b/src/northbridge/intel/e7505/debug.c index f3a27e2..c21e321 100644 --- a/src/northbridge/intel/e7505/debug.c +++ b/src/northbridge/intel/e7505/debug.c @@ -183,15 +183,3 @@ port++; } } - -void dump_mem(unsigned start, unsigned end) -{ - unsigned i; - printk(BIOS_DEBUG, "dump_mem:"); - for (i = start; i < end; i++) { - if ((i & 0xf)==0) - printk(BIOS_DEBUG, "\n%08x:", i); - printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i)); - } - printk(BIOS_DEBUG, "\n"); -} diff --git a/src/northbridge/intel/e7505/debug.h b/src/northbridge/intel/e7505/debug.h index 238c500..98ca848 100644 --- a/src/northbridge/intel/e7505/debug.h +++ b/src/northbridge/intel/e7505/debug.h @@ -22,6 +22,5 @@ void dump_spd_registers(const struct mem_controller *ctrl); void dump_smbus_registers(void); void dump_io_resources(unsigned port); -void dump_mem(unsigned start, unsigned end);
#endif diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c index ef4f17b..c52f2a6 100644 --- a/src/northbridge/intel/i945/debug.c +++ b/src/northbridge/intel/i945/debug.c @@ -96,15 +96,3 @@ printk(BIOS_DEBUG, "\n"); } } - -void dump_mem(unsigned int start, unsigned int end) -{ - unsigned int i; - printk(BIOS_DEBUG, "dump_mem:"); - for (i = start; i < end; i++) { - if ((i & 0xf) == 0) - printk(BIOS_DEBUG, "\n%08x:", i); - printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i)); - } - printk(BIOS_DEBUG, "\n"); -} diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 65a40e7..757eb52 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -379,7 +379,6 @@ void dump_pci_device(unsigned int dev); void dump_pci_devices(void); void dump_spd_registers(void); -void dump_mem(unsigned int start, unsigned int end);
u32 decode_igd_memory_size(u32 gms); u32 decode_tseg_size(const u8 esmramc);