[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: lock chipset BAR registers via MSR 0x2E7

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36339 )

Change subject: soc/intel/skylake: lock chipset BAR registers via MSR 0x2E7
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Uploaded patch set 3.