[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add romstage common stage file

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39222 )

Change subject: soc/intel/tigerlake: Add romstage common stage file
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Patch Set 5:

(1 comment)

File src/soc/intel/tigerlake/romstage/romstage.c:

https://review.coreboot.org/c/coreboot/+/39222/comment/c467f26d_a58d0123 
PS5, Line 25: void romstage_mb_post_mem_init()
Bad function definition - void romstage_mb_post_mem_init() should probably be void romstage_mb_post_mem_init(void)