[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: pass verstage timestamps to x86

[Kangheui Won (Code Review)]

Hello build bot (Jenkins), Martin Roth, Furquan Shaikh, Patrick Georgi, Aaron Durbin,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45059

to look at the new patch set (#6).

Change subject: soc/amd/picasso: pass verstage timestamps to x86
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soc/amd/picasso: pass verstage timestamps to x86

Initialize timestamp table with data from psp_verstage on bootblock.

PSP will keep its own timer value when x86 is released on
transfer_buffer. So we need certain offset to x86 timer but it's
difficult to keep the offset across various stages in coreboot and
depthcharge.

Adding value directly to TSC can sovle it, it will be kept across
coreboot and depthcharge.

BUG=b:159220781, b:167148121
BRANCH=zork
TEST=boot to kernel, run 'cbmem -t' and check verstage timestamps are
included in the result.

Change-Id: I5e89bb54f478153fb40ba51b5ab61fa20af3b99a
Signed-off-by: Kangheui Won 
---
M src/soc/amd/picasso/bootblock/bootblock.c
1 file changed, 50 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/45059/6