Attention is currently required from: Arthur Heymans, Nico Huber, Maulik V Vaghela, Mario Scheithauer, Angel Pons, Subrata Banik, Lean Sheng Tan, Patrick Rudolph, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55367 )
Change subject: soc/intel/elkhartlake: Introduce Intel PSE ......................................................................
Patch Set 52:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55367/comment/eaffbd12_4ce249d6 PS52, Line 23: it's its
https://review.coreboot.org/c/coreboot/+/55367/comment/c5fad13e_d33d63e9 PS52, Line 27: locate locates the
https://review.coreboot.org/c/coreboot/+/55367/comment/68c6dfc2_b89de67a PS52, Line 30: enables enable
https://review.coreboot.org/c/coreboot/+/55367/comment/53dd3958_194341ee PS52, Line 32: These assignments Exactly one space please.
https://review.coreboot.org/c/coreboot/+/55367/comment/6e1cc1a6_b0e044f6 PS52, Line 9: The Intel® Programmable Services Engine (Intel® PSE) is a : dedicated offload engine for IoT functions powered by an ARM : Cortex-M7 microcontroller. It provides independent, low-DMIPS : computing and low-speed I/Os for IoT applications, plus : dedicated services for real-time computing and time-sensitive : synchronization. : : The PSE hosts new functions, including remote out-of-band : device management, network proxy, embedded controller lite : and sensor hub. : : This CL enables the user to provide the base address of the : PSE FW blob which will then be loaded by the FSP-S onto the : ARM controller. PSE FW will do the initialization work of : PSE controller and it's peripherals. The loading of PSE FW : should have negligible impact on boot time unless PSE : controller could not locate PSE FW and FSP will attempt to : redo PSE FW loading and wait for PSE handshake until it times : out. Once PSE controller locate PSE FW, it will do initialization : concurrently by itself with coreboot booting. : : It also adds PSE related FSP-S UPD settings which enables the : setup of peripheral ownership (assigned to the PSE or x86 : subsystem) and interrupts. These assignments need to take : place at a given point in the boot process and cannot be : changed later. : : To verify if PSE FW is loaded properly, the user could enable : PchPseShellEnabled flag and the log will be printed at PSE UART 2. : : For further info please refer to doc #611825 (for HW overview) : and #614110 (for PSE EDS). Please reflow for 75 characters per line.