[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Add support to update the FIVR configs

[V Sowmya (Code Review)]

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph.
Hello build bot (Jenkins), Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/55702

to look at the new patch set (#3).

Change subject: soc/intel/alderlake: Add support to update the FIVR configs
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soc/intel/alderlake: Add support to update the FIVR configs

This patch adds the supports to update the optimal FIVR
configurations for external voltage rails via devicetree.

Signed-off-by: V Sowmya 
Change-Id: Icf6c74bda5a167abf63938ebed6affc6b31c76f5
---
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/fsp_params.c
2 files changed, 88 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/55702/3