[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Refactor TCSS ASL to add \_SB.PCI1 support

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41024 )

Change subject: soc/intel/tigerlake: Refactor TCSS ASL to add _SB.PCI1 support
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Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41024/3/src/soc/intel/tigerlake/acp... 
File src/soc/intel/tigerlake/acpi/tcss.asl:

https://review.coreboot.org/c/coreboot/+/41024/3/src/soc/intel/tigerlake/acp... 
PS3, Line 507: PCI1
So we're just repeating the same code but changing the path? Also, if segment groups are > 1 why are we assuming the device is living on segment 1. What if it's segment 2?