[coreboot-gerrit] [XS] Change in coreboot[main]: mb/google/rex/var/karis: Set SOC_TCHSCR_RST output low in bootblock

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80000?usp=email )

Change subject: mb/google/rex/var/karis: Set SOC_TCHSCR_RST output low in bootblock
......................................................................

mb/google/rex/var/karis: Set SOC_TCHSCR_RST output low in bootblock

Check MTL EDS2, SOC_TCHSCR_RST(GPP_C01) default setting is NF1.
Set SOC_TCHSCR_RST to output low in early_gpio_table.

BUG=none
TEST=Build and test on karis, touchscreen function works

Change-Id: Ieebd3cf3c320bc895d036c372f792ec7b5d7ebf9
Signed-off-by: Tyler Wang 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80000
Tested-by: build bot (Jenkins) 
Reviewed-by: Kapil Porwal 
Reviewed-by: Subrata Banik 
Reviewed-by: Eric Lai 
---
M src/mainboard/google/rex/variants/karis/gpio.c
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Eric Lai: Looks good to me, approved
  Kapil Porwal: Looks good to me, approved
  Subrata Banik: Looks good to me, approved

diff --git a/src/mainboard/google/rex/variants/karis/gpio.c b/src/mainboard/google/rex/variants/karis/gpio.c
index 8c0f929..6bd23ca 100644
--- a/src/mainboard/google/rex/variants/karis/gpio.c
+++ b/src/mainboard/google/rex/variants/karis/gpio.c
@@ -403,6 +403,8 @@

/* GPP_C00 : [] ==> EN_TCHSCR_PWR */
    PAD_CFG_GPO(GPP_C00, 1, DEEP),
+	/* GPP_C01 : [] ==> SOC_TCHSCR_RST_R_L */
+	PAD_CFG_GPO(GPP_C01, 0, DEEP),
 };

static const struct pad_config romstage_gpio_table[] = {