[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Set PCIe L1 substates capabilities register

[Matt DeVillier (Code Review)]

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46134 )

Change subject: sb/intel/lynxpoint: Set PCIe L1 substates capabilities register
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Patch Set 3:

(3 comments)

https://review.coreboot.org/c/coreboot/+/46134/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/46134/1//COMMIT_MSG@7 
PS1, Line 7: lnyxpoint
> Linux Point! 😄

Done

https://review.coreboot.org/c/coreboot/+/46134/1//COMMIT_MSG@11 
PS1, Line 11: gogole
> google doesn't have a googol boards yet 😜

Done

https://review.coreboot.org/c/coreboot/+/46134/2/src/southbridge/intel/lynxp... 
File src/southbridge/intel/lynxpoint/pcie.c:

https://review.coreboot.org/c/coreboot/+/46134/2/src/southbridge/intel/lynxp... 
PS2, Line 681: 	/* Set L1 Sub-State Cap ID to 1Eh and Next Cap Pointer to None. */
> I'd rather keep it where it is

Ack