[coreboot-gerrit] Change in coreboot[master]: mb/g/drallion: Clean up none used weak function

[EricR Lai (Code Review)]

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37780 )

Change subject: mb/g/drallion: Clean up none used weak function
......................................................................

mb/g/drallion: Clean up none used weak function

Drallion only support on board dimm. Remove the spd read from
smbus. Since remove the Wlico 1.0 CML variants, weak function
is not needed.

BUG=b:140068267
TEST=boot into OS without issue
BRANCH=none

Signed-off-by: Eric Lai 
Change-Id: I662f87ccf48ba470998fa28fb14c9985673cb37d
---
M src/mainboard/google/drallion/romstage.c
1 file changed, 0 insertions(+), 45 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/37780/1

diff --git a/src/mainboard/google/drallion/romstage.c b/src/mainboard/google/drallion/romstage.c
index 03bc17f..ed9923f 100644
--- a/src/mainboard/google/drallion/romstage.c
+++ b/src/mainboard/google/drallion/romstage.c
@@ -18,51 +18,6 @@
 #include <soc/romstage.h>
 #include <baseboard/variants.h>

-void __weak variant_mainboard_post_init_params(FSPM_UPD *mupd) {}
-
-static const struct cnl_mb_cfg memcfg = {
-	/* Access memory info through SMBUS. */
-	.spd[0] = {
-		.read_type = READ_SMBUS,
-		.spd_spec = {.spd_smbus_address = 0xa0},
-	},
-	.spd[1] = {.read_type = NOT_EXISTING},
-	.spd[2] = {
-		.read_type = READ_SMBUS,
-		.spd_spec = {.spd_smbus_address = 0xa4},
-	},
-	.spd[3] = {.read_type = NOT_EXISTING},
-
-	/*
-	 * The dqs_map arrays map the ddr4 pins to the SoC pins
-	 * for both channels.
-	 *
-	 * the index = pin number on ddr4 part
-	 * the value = pin number on SoC
-	 */
-	.dqs_map[DDR_CH0] = {0, 1, 4, 5, 2, 3, 6, 7},
-	.dqs_map[DDR_CH1] = {0, 1, 4, 5, 2, 3, 6, 7},
-
-	/* Baseboard uses 121, 81 and 100 rcomp resistors */
-	.rcomp_resistor = {121, 81, 100},
-
-	/*
-	 * Baseboard Rcomp target values.
-	 */
-	.rcomp_targets = {100, 40, 20, 20, 26},
-
-	/* Disable Early Command Training */
-	.ect = 0,
-
-	/* Base on board design */
-	.vref_ca_config = 2,
-};
-
-const struct cnl_mb_cfg * __weak get_variant_memory_cfg(struct cnl_mb_cfg *mem_cfg)
-{
-	return &memcfg;
-}
-
 void mainboard_memory_init_params(FSPM_UPD *memupd)
 {
    struct cnl_mb_cfg board_memcfg;