[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Add set_mmio_dev_ops() to set ops for MMIO devices

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42067 )

Change subject: soc/amd/picasso: Add set_mmio_dev_ops() to set ops for MMIO devices
......................................................................

soc/amd/picasso: Add set_mmio_dev_ops() to set ops for MMIO devices

This change adds a helper function set_mmio_dev_ops() in chip.c which
is used for setting the dev->ops for MMIO devices based on the
comparison of MMIO address in device tree to the pre-defined base
addresses in iomap.h.

Call to i2c_acpi_name() is replaced with set_mmio_dev_ops and scope of
i2c_acpi_name is restricted to i2c.c since it is not required to be
exposed out of that file.

Change-Id: I31f96cfe8267b0df37012baeb7cfcaec9c2280f6
Signed-off-by: Furquan Shaikh 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42067
Tested-by: build bot (Jenkins) 
Reviewed-by: Raul Rangel 
---
M src/soc/amd/picasso/chip.c
M src/soc/amd/picasso/i2c.c
2 files changed, 14 insertions(+), 7 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Raul Rangel: Looks good to me, approved

diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index dc661d2..ed39b53 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -8,6 +8,7 @@
 #include <soc/acpi.h>
 #include <soc/cpu.h>
 #include <soc/data_fabric.h>
+#include <soc/iomap.h>
 #include <soc/pci_devs.h>
 #include <soc/southbridge.h>
 #include "chip.h"
@@ -15,7 +16,6 @@

/* Supplied by i2c.c */
 extern struct device_operations picasso_i2c_mmio_ops;
-extern const char *i2c_acpi_name(const struct device *dev);

struct device_operations cpu_bus_ops = {
    .read_resources	  = noop_read_resources,
@@ -119,6 +119,17 @@
    .acpi_fill_ssdt		= acpi_device_write_pci_dev,
 };

+static void set_mmio_dev_ops(struct device *dev)
+{
+	switch (dev->path.mmio.addr) {
+	case APU_I2C2_BASE:
+	case APU_I2C3_BASE:
+	case APU_I2C4_BASE:
+		dev->ops = &picasso_i2c_mmio_ops;
+		break;
+	}
+}
+
 static void enable_dev(struct device *dev)
 {
    /* Set the operations if it is a special bus type */
@@ -136,8 +147,7 @@
    	}
    	sb_enable(dev);
    } else if (dev->path.type == DEVICE_PATH_MMIO) {
-		if (i2c_acpi_name(dev) != NULL)
-			dev->ops = &picasso_i2c_mmio_ops;
+		set_mmio_dev_ops(dev);
    }
 }

diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c
index 4c8c669..fa59b99 100644
--- a/src/soc/amd/picasso/i2c.c
+++ b/src/soc/amd/picasso/i2c.c
@@ -13,9 +13,6 @@
 #include <soc/southbridge.h>
 #include "chip.h"

-/* Global to provide access to chip.c */
-const char *i2c_acpi_name(const struct device *dev);
-
 /*
  * We don't have addresses for I2C0-1.
  */
@@ -48,7 +45,7 @@
    return &config->i2c[bus];
 }

-const char *i2c_acpi_name(const struct device *dev)
+static const char *i2c_acpi_name(const struct device *dev)
 {
    switch (dev->path.mmio.addr) {
    case APU_I2C2_BASE: