18 Dec
2019
18 Dec
'19
7:22 a.m.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37704 )
Change subject: soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MB ......................................................................
Patch Set 3:
Should such changes of defaults in chipset code be announced to the list, or be visibly documented in the release notes?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I8a06b9fba5ad561d8595292a73136091ab532faa
Gerrit-Change-Number: 37704
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