[coreboot-gerrit] Change in coreboot[master]: soc/intel/broadwell: Remove unnecessary array

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46369 )

Change subject: soc/intel/broadwell: Remove unnecessary array
......................................................................

soc/intel/broadwell: Remove unnecessary array

The MAD_DIMM registers can be read within the loop just fine.

Change-Id: Id0c79aaa506f7545826445bc5b065408105b46ba
Signed-off-by: Angel Pons 
---
M src/soc/intel/broadwell/include/soc/systemagent.h
M src/soc/intel/broadwell/romstage/raminit.c
2 files changed, 5 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/46369/1

diff --git a/src/soc/intel/broadwell/include/soc/systemagent.h b/src/soc/intel/broadwell/include/soc/systemagent.h
index 6d3ee31..af3e473 100644
--- a/src/soc/intel/broadwell/include/soc/systemagent.h
+++ b/src/soc/intel/broadwell/include/soc/systemagent.h
@@ -87,6 +87,9 @@
 #define MCHBAR16(x)	*((volatile u16 *)(MCH_BASE_ADDRESS + (x)))
 #define MCHBAR32(x)	*((volatile u32 *)(MCH_BASE_ADDRESS + (x)))

+/* Memory controller characteristics */
+#define NUM_CHANNELS	2
+
 #define MAD_CHNL		0x5000
 #define MAD_DIMM(ch)		(0x5004 + 4 * (ch))

diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index 98002c6..7020ddf 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -34,12 +34,9 @@
  */
 static void report_memory_config(void)
 {
-	u32 addr_decode_ch[2];
    int i;

const u32 addr_decoder_common = MCHBAR32(MAD_CHNL);
-	addr_decode_ch[0] = MCHBAR32(MAD_DIMM(0));
-	addr_decode_ch[1] = MCHBAR32(MAD_DIMM(1));

printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n",
           (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100);
@@ -49,8 +46,8 @@
           (addr_decoder_common >> 2) & 3,
           (addr_decoder_common >> 4) & 3);

-	for (i = 0; i < ARRAY_SIZE(addr_decode_ch); i++) {
-		u32 ch_conf = addr_decode_ch[i];
+	for (i = 0; i < NUM_CHANNELS; i++) {
+		const u32 ch_conf = MCHBAR32(MAD_DIMM(i));

printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", i, ch_conf);
    	printk(BIOS_DEBUG, "   ECC %s\n", ecc_decoder[(ch_conf >> 24) & 3]);