Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39491 )
Change subject: soc/intel/cannonlake/bootblock: Fix FSP CAR
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Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/39491/2/src/soc/intel/cannonlake/bo...
File src/soc/intel/cannonlake/bootblock/bootblock.c:
https://review.coreboot.org/c/coreboot/+/39491/2/src/soc/intel/cannonlake/bo...
PS2, Line 51: (uint32_t)(0x100000000ULL - CACHE_ROM_SIZE,
Does this fit on the previous line?
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Gerrit-Project: coreboot
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