Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11076
-gerrit
commit fdbfe2f257a630aaa56c9a5c040d38e2e681bea7 Author: Stefan Reinauer reinauer@chromium.org Date: Wed Jul 29 23:54:38 2015 -0700
Straighten up AMDs API
There are some inconsistencies in AMDs APIs between the coreboot code and the vendorcode code. Unify the API.
Change-Id: Idebf36c45367ec4dcd21cbe53a6c534857ab5dd7 Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org --- src/mainboard/amd/dinar/rd890_cfg.c | 2 +- src/mainboard/amd/dinar/sb700_cfg.c | 2 +- src/northbridge/amd/cimx/rd890/amd.h | 2 +- src/vendorcode/amd/agesa/common/Porting.h | 24 ++++++++++++++---------- src/vendorcode/amd/cimx/sb700/SBTYPE.h | 2 +- src/vendorcode/amd/cimx/sb800/AMDSBLIB.h | 4 +++- src/vendorcode/amd/cimx/sb900/AmdSbLib.h | 4 ++-- src/vendorcode/amd/cimx/sb900/SbDef.h | 2 +- src/vendorcode/amd/cimx/sb900/SbMain.c | 2 +- src/vendorcode/amd/cimx/sb900/SbSubFun.h | 5 +++-- 10 files changed, 28 insertions(+), 21 deletions(-)
diff --git a/src/mainboard/amd/dinar/rd890_cfg.c b/src/mainboard/amd/dinar/rd890_cfg.c index c90f9f0..13f18ec 100644 --- a/src/mainboard/amd/dinar/rd890_cfg.c +++ b/src/mainboard/amd/dinar/rd890_cfg.c @@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */ //pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS; pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS; - pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry; + pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
/* * PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform. diff --git a/src/mainboard/amd/dinar/sb700_cfg.c b/src/mainboard/amd/dinar/sb700_cfg.c index 53e93ce..2ce47ce 100644 --- a/src/mainboard/amd/dinar/sb700_cfg.c +++ b/src/mainboard/amd/dinar/sb700_cfg.c @@ -135,7 +135,7 @@ void sb700_cimx_config(AMDSBCFG *sb_config) #ifndef __PRE_RAM__ /* ramstage cimx config here */ if (!sb_config->StdHeader.pCallBack) { - sb_config->StdHeader.pCallBack = sb700_callout_entry; + sb_config->StdHeader.pCallBack = (CIM_HOOK_ENTRY)&sb700_callout_entry; }
//sb_config-> diff --git a/src/northbridge/amd/cimx/rd890/amd.h b/src/northbridge/amd/cimx/rd890/amd.h index 5e69ac4..ade5a31 100644 --- a/src/northbridge/amd/cimx/rd890/amd.h +++ b/src/northbridge/amd/cimx/rd890/amd.h @@ -41,7 +41,7 @@ #define OUT #define IMAGE_SIGNATURE 'DMA$'
-typedef UINTN AGESA_STATUS; +typedef UINT32 AGESA_STATUS;
#define AGESA_SUCCESS ((AGESA_STATUS) 0x0) diff --git a/src/vendorcode/amd/agesa/common/Porting.h b/src/vendorcode/amd/agesa/common/Porting.h index fc65cfc..3607c4a 100644 --- a/src/vendorcode/amd/agesa/common/Porting.h +++ b/src/vendorcode/amd/agesa/common/Porting.h @@ -216,6 +216,7 @@
#elif defined __GNUC__
+ #include <stdint.h> #define IN #define OUT #define STATIC static @@ -228,17 +229,20 @@ #define CALLCONV #define _16BYTE_ALIGN __attribute__ ((aligned (16)))
+ + // Create the universal 32, 16, and 8-bit data types typedef unsigned char BOOLEAN; - typedef signed char INT8; - typedef signed short INT16; - typedef signed long INT32; - typedef char CHAR8; - typedef unsigned char UINT8; - typedef unsigned short UINT16; - typedef unsigned long UINT32; - typedef unsigned long UINTN; - typedef unsigned long long UINT64; - typedef long long INT64; + typedef uintptr_t UINTN; + typedef int64_t INT64; + typedef uint64_t UINT64; + typedef int32_t INT32; + typedef uint32_t UINT32; + typedef int16_t INT16; + typedef uint16_t UINT16; + typedef int8_t INT8; + typedef uint8_t UINT8; + typedef int8_t CHAR8; + typedef unsigned short CHAR16; typedef void VOID; //typedef unsigned long size_t;
diff --git a/src/vendorcode/amd/cimx/sb700/SBTYPE.h b/src/vendorcode/amd/cimx/sb700/SBTYPE.h index faeae5d..3dc571f 100644 --- a/src/vendorcode/amd/cimx/sb700/SBTYPE.h +++ b/src/vendorcode/amd/cimx/sb700/SBTYPE.h @@ -32,7 +32,7 @@
#pragma pack(push,1)
-typedef UINT32 (*CIM_HOOK_ENTRY)(UINT32 Param1, UINTN Param2, void* pConfig); +typedef UINT32 (*CIM_HOOK_ENTRY)(UINT32 Param1, UINT32 Param2, void* pConfig); typedef void (*SMM_SERVICE_ROUTINE) (void);
typedef struct _STDCFG{ diff --git a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h index 9e50bf9..a50cda4 100644 --- a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h +++ b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h @@ -46,6 +46,8 @@ #ifndef __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__ #define __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
+#include <cpu/amd/common/cbtypes.h> + //AMDSBLIB Routines
/** @@ -105,7 +107,7 @@ AGESA_STATUS AmdSbDispatcher (IN void *pConfig); * @param[in] Length - Data length * */ -void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN unsigned int Length); +void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN UINTN Length);
/* SB800 CIMx and AGESA V5 can share lib functions */ diff --git a/src/vendorcode/amd/cimx/sb900/AmdSbLib.h b/src/vendorcode/amd/cimx/sb900/AmdSbLib.h index cf9589b..47a7048 100644 --- a/src/vendorcode/amd/cimx/sb900/AmdSbLib.h +++ b/src/vendorcode/amd/cimx/sb900/AmdSbLib.h @@ -69,10 +69,10 @@ unsigned char getEfuseByte (IN unsigned char Index); AGESA_STATUS AmdSbDispatcher (IN void *pConfig);
/**< AmdSbCopyMem - Reserved */ -void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN unsigned int Length); +void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN UINTN Length);
/**< GetRomSigPtr - Reserved */ -void* GetRomSigPtr (IN unsigned int* RomSigPtr); +void* GetRomSigPtr (IN UINTN * RomSigPtr);
/**< RWXhciIndReg - Reserved */ void RWXhciIndReg (IN unsigned int Index, IN unsigned int AndMask, IN unsigned int OrMask); diff --git a/src/vendorcode/amd/cimx/sb900/SbDef.h b/src/vendorcode/amd/cimx/sb900/SbDef.h index 91fec4a..b600627 100644 --- a/src/vendorcode/amd/cimx/sb900/SbDef.h +++ b/src/vendorcode/amd/cimx/sb900/SbDef.h @@ -71,7 +71,7 @@ void MemoryCopy ( IN unsigned char *Dest, IN unsigned char *Source, - IN unsigned int Size + IN unsigned long Size );
//AMD Library Routines (PCILIB.C) diff --git a/src/vendorcode/amd/cimx/sb900/SbMain.c b/src/vendorcode/amd/cimx/sb900/SbMain.c index 958e44b..7c9dbbd 100644 --- a/src/vendorcode/amd/cimx/sb900/SbMain.c +++ b/src/vendorcode/amd/cimx/sb900/SbMain.c @@ -278,7 +278,7 @@ sbSmmAcpiOn ( UINTN CallBackToOEM ( IN UINT32 Func, - IN UINT32 Data, + IN UINTN Data, IN AMDSBCFG* pConfig ) { diff --git a/src/vendorcode/amd/cimx/sb900/SbSubFun.h b/src/vendorcode/amd/cimx/sb900/SbSubFun.h index 447f5c9..68574a7 100644 --- a/src/vendorcode/amd/cimx/sb900/SbSubFun.h +++ b/src/vendorcode/amd/cimx/sb900/SbSubFun.h @@ -40,6 +40,7 @@ ; ;*********************************************************************************/
+#include <cpu/amd/common/cbtypes.h> // Southbridge SBMAIN Routines
/** @@ -127,7 +128,7 @@ void sbSmmAcpiOn (IN AMDSBCFG* pConfig); * @param[in] Data Callback specific data. * @param[in] pConfig Southbridge configuration structure pointer. */ -unsigned int CallBackToOEM (IN unsigned int Func, IN unsigned int Data, IN AMDSBCFG* pConfig); +UINTN CallBackToOEM (IN unsigned int Func, IN UINTN Data, IN AMDSBCFG* pConfig);
// Southbridge SBPOR Routines @@ -605,4 +606,4 @@ void TurnOffCG2 (OUT void); */ void BackUpCG2 (OUT void);
-void XhciA12Fix (OUT void); \ No newline at end of file +void XhciA12Fix (OUT void);