Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41075 )
Change subject: soc/amd/picasso: Enable eSPI capability for Picasso ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/41075/5/src/soc/amd/picasso/southbr... File src/soc/amd/picasso/southbridge.c:
https://review.coreboot.org/c/coreboot/+/41075/5/src/soc/amd/picasso/southbr... PS5, Line 292: if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
please, no space before tabs
Done
https://review.coreboot.org/c/coreboot/+/41075/5/src/soc/amd/picasso/southbr... PS5, Line 292: if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
please, no spaces at the start of a line
Done
https://review.coreboot.org/c/coreboot/+/41075/5/src/soc/amd/picasso/southbr... PS5, Line 292: if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
code indent should use tabs where possible
Done