Attention is currently required from: Raul Rangel, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer.
Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74095 )
Change subject: mb/google/myst: First pass GPIO configuration for Myst ......................................................................
Patch Set 7:
(10 comments)
File src/mainboard/google/myst/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/74095/comment/09e3917c_fbe3b5fc PS7, Line 17: GPIO_3
GPIO_7
Done
https://review.coreboot.org/c/coreboot/+/74095/comment/4b534e5e_5de1d8e4 PS7, Line 17: PAD_WAKE(GPIO_3, PULL_NONE, EDGE_LOW, S0i3),
As per the schematics, SOC_PEN_DETECT_ODL is in AGPIO7 and this is unused.
Done
https://review.coreboot.org/c/coreboot/+/74095/comment/47c7eba6_db5d4c0d PS7, Line 22: EN_PWR_WWAN_X
Leave it LOW so that on SKUs without WWAN module, we are not leaking power. […]
Done
https://review.coreboot.org/c/coreboot/+/74095/comment/1cda60e7_f7976723 PS7, Line 30: /* Unused */ : PAD_NC(GPIO_10),
Coreboot should not touch it. This is handled by SMU and should be left as is.
Done
https://review.coreboot.org/c/coreboot/+/74095/comment/29f30215_3004e344 PS7, Line 32: WWAN_RST_L
This is listed as just `WWAN_RST`, no `_L`.
Done
https://review.coreboot.org/c/coreboot/+/74095/comment/2a8486d5_d8e61c41 PS7, Line 33: HIGH
Update this to `LOW`, since this is not active low (assuming documentation is correct).
Done
https://review.coreboot.org/c/coreboot/+/74095/comment/88cec3fd_bc82c7e3 PS7, Line 39: EC_SOC_WAKE_R_L
`EC_SOC_WAKE_R_ODL`
Done
https://review.coreboot.org/c/coreboot/+/74095/comment/bcea0ee9_c8583bd1 PS7, Line 52: PULL_UP
There is an external pull-up in the schematics. So I dont think an internal pull-up is required.
Done
https://review.coreboot.org/c/coreboot/+/74095/comment/ce4a214f_e8fc0326 PS7, Line 80: /* ESPI1_DATA2 */ : PAD_NF(GPIO_68, SPI1_DAT2, PULL_NONE), : /* ESPI1_DATA3 */ : PAD_NF(GPIO_69, SPI1_DAT3, PULL_NONE),
These are not defined in go/myst-gpios.
They are defined in go/myst-gpios as AGPIO68/AGPIO69 Cumulative GPIO's 31 and 32
https://review.coreboot.org/c/coreboot/+/74095/comment/c06464ba_11c8bc0b PS7, Line 116: /* SPI_SOC_DO_TCHSCR_DO_R */ : PAD_NF(GPIO_105, SPI2_DAT1, PULL_NONE),
Not defined in go/myst-gpios.
Defined as EGPIO105 at cumulative GPIO 57