[coreboot-gerrit] Change in coreboot[master]: psp_verstage: add new svc for cezanne

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Kangheui Won, Rob Barnes, Felix Held.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61368 )

Change subject: psp_verstage: add new svc for cezanne
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Patch Set 1:

(1 comment)

File src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h:

https://review.coreboot.org/c/coreboot/+/61368/comment/81a16fa2_593ec95d 
PS1, Line 144:     CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT     = 0x4, // used for boundary check
> Reading the comment on the other CL, should we remove the values we aren't going to support? i.e. […]

May be add a comment on the side about unused boot modes in PSP verstage. That will keep the change as close to PSP release while still adding the clarity regarding which boot modes are supported.