[coreboot-gerrit] Change in coreboot[master]: soc/intel/tgl: add device UART #3 to chipset devicetree

[Angel Pons (Code Review)]

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Michael Niewöhner, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62624 )

Change subject: soc/intel/tgl: add device UART #3 to chipset devicetree
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Patch Set 2: Code-Review-1

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62624/comment/dceaae5f_9ad5eb8d 
PS2, Line 9: Reference: Intel doc# 631119-007
The only reference to UART controller #3 I could find in this document is in `Table 6. PCH-UP3/UP4 Device and Revision ID Table`. The rest of the document says/implies there are only 3 UART controllers (0, 1, 2).

Do you have other sources that confirm the existence of UART controller #3? Are there any pads for this UART #3?

Patchset:

PS2: 
I'm not convinced that this device actually exists. My -1 is because uart.c needs to be updated accordingly.