[coreboot-gerrit] Change in coreboot[master]: mainboard/google/volteer: Enable long cr50 ready pulses

[Julius Werner (Code Review)]

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44359 )

Change subject: mainboard/google/volteer: Enable long cr50 ready pulses
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Patch Set 4:
> Putting some code in soc/intel/tigerlake guarded by TPM_CR50 will nicely separate category 1 from the other two.  However, we need some mainboard declarations in order to distinguish between categories 2 and 3.

Okay, fair enough, that's a reasonable argument. I'll let the x86 guys chime in on where they think this should be. Either option sounds reasonable to me.