Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4255
-gerrit
commit b8eb94f8da6fa858f7bd9bdde56b4cf3f2eb603a Author: Gabe Black gabeblack@google.com Date: Wed Jun 19 20:48:06 2013 -0700
libpayload: ARM: Don't leave alignment checking on after the exception test
Currently, the exception handling code on ARM in libpayload turns on alignment checks as an easy way to generate an exception for testing purposes. It was leaving it on which disabled unaligned accesses for other, unlreated code running later. This change adjusts the code so the original value of the alignment bit is restored after the test exception.
Built and booted into depthcharge on pit with an unaligned accesses added after the call to exception_init in the depthcharge's main. Before this change, the access caused an exception. After this change, the access completed successfully.
Change-Id: If92cab3cc8eabca7c5b0560ce88a8796a27fe3b2 Signed-off-by: Gabe Black gabeblack@google.com Reviewed-on: https://gerrit.chromium.org/gerrit/59372 Reviewed-by: Stefan Reinauer reinauer@google.com Commit-Queue: Gabe Black gabeblack@chromium.org Tested-by: Gabe Black gabeblack@chromium.org --- payloads/libpayload/arch/armv7/exception.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/payloads/libpayload/arch/armv7/exception.c b/payloads/libpayload/arch/armv7/exception.c index 5e4e23d..9efc312 100644 --- a/payloads/libpayload/arch/armv7/exception.c +++ b/payloads/libpayload/arch/armv7/exception.c @@ -143,9 +143,8 @@ void exception_init(void) sctlr &= ~sctlr_te; /* Set V=0 in SCTLR so VBAR points to the exception vector table. */ sctlr &= ~sctlr_v; - /* Enforce alignment. */ - sctlr |= sctlr_a; - set_sctlr(sctlr); + /* Enforce alignment temporarily. */ + set_sctlr(sctlr | sctlr_a);
extern uint32_t exception_table[]; set_vbar((uintptr_t)exception_table); @@ -153,4 +152,7 @@ void exception_init(void) test_abort = 1; exception_test(); test_abort = 0; + + /* Restore alignment settings. */ + set_sctlr(sctlr); }