Attention is currently required from: Krystian Hebel, Michał Żygowski, Nico Huber, Piotr Król.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79612?usp=email )
Change subject: mb/pcengines/apu2/mainboard: fix up ECC scrubber configuration
......................................................................
Patch Set 7:
(1 comment)
File src/mainboard/pcengines/apu2/mainboard.c:
https://review.coreboot.org/c/coreboot/+/79612/comment/06755445_431888d9 :
PS2, Line 277: val = pci_read_config32(DEV_PTR(ht_3), 0xB8);
: val &= 0xF000003F;
: pci_write_config32(DEV_PTR(ht_3), 0xB8, val);
if my understanding is correctly, bit 26 and 27 need to be 0 for ecc error injection to work; still […]
since clearing all reserved bits from 10..27 should be safe to do and the public documentation is missing part of the register description, i'd say that we should just clear all those reserved bits.
still leaving the other unresolved comment unresolved, since it might be better to test again before submitting this change
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