Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43308 )
Change subject: soc/amd/picasso: Init SPI in psp_verstage ......................................................................
soc/amd/picasso: Init SPI in psp_verstage
SPI needs to be initialized to save VBNV (Vboot Non-Volatile memory) to flash.
BUG=b:159811539 TEST=Build & boot.
Signed-off-by: Martin Roth martin@coreboot.org Change-Id: Iebf3ed3f5d6be0dda717d91d5b2fbcf2a1cc43cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/43308 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/picasso/psp_verstage/fch.c 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/soc/amd/picasso/psp_verstage/fch.c b/src/soc/amd/picasso/psp_verstage/fch.c index e01a684..5096088 100644 --- a/src/soc/amd/picasso/psp_verstage/fch.c +++ b/src/soc/amd/picasso/psp_verstage/fch.c @@ -4,6 +4,7 @@
#include <amdblocks/acpimmio.h> #include <amdblocks/espi.h> +#include <amdblocks/spi.h> #include <arch/exception.h> #include <arch/hlt.h> #include <arch/io.h> @@ -84,6 +85,7 @@ {"eSPI", {FCH_IO_DEVICE_ESPI}, espi_set_bar}, {"I2C2", {FCH_IO_DEVICE_I2C, 2}, i2c2_set_bar}, {"I2C3", {FCH_IO_DEVICE_I2C, 3}, i2c3_set_bar}, + {"SPI", {FCH_IO_DEVICE_SPI}, spi_set_base}, {"AOAC", {FCH_IO_DEVICE_AOAC}, aoac_set_bar}, };