Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41384 )
Change subject: device/pci_device: Add notion of "hidden" PCI devices ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41384/7/src/device/pci_device.c File src/device/pci_device.c:
https://review.coreboot.org/c/coreboot/+/41384/7/src/device/pci_device.c@122... PS7, Line 1223: * ID as if there were no device there (0xffffffff).
I would prefer to _not_ treat hidden devices as PCI devices. […]
My goal of this is to make it simpler for us to deal with the PCI devices that the FSP decides to hide (i.e., config space makes it look like nobody's home). Currently, because the device is invisible to enumeration, we are forced to include its PCI resources elsewhere, and we also cannot enable any SSDT generation for these devices. This method seemed like a fairly clean way to enable us to do both of these. Right now, the PMC's MMIO resource is exposed through the SA's fixed resources (MCHBAR, etc.), and the I/O resource lives off of the eSPI/LPC device.
The problem with making it a generic device is that direct children of a domain can only be PCI devices. For SSDT generation, that also makes it trickier to get a proper hierarchy of ACPI devices, because the kernel expects _SB.PCI0.PMC for the device's path.
This is a "real" PCI device; at some point in the boot flow it exposes the config space, and it does occupy the BDF.
The other way way to handle it (although I prefer this patch's approach) would be to have a special even earlier PCI enumeration for these devices.