Julien Viard de Galbert has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47340 )
Change subject: src/soc/intel/denverton_ns: Update to several improvement in coreboot since 4.9 ......................................................................
src/soc/intel/denverton_ns: Update to several improvement in coreboot since 4.9
Signed-off-by: Julien Viard de Galbert julien@vdg.name Change-Id: Ibc5ce91118c6052af23642fb3461f574cd888dea --- M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc 2 files changed, 22 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/47340/1
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 89bbbb0..888713a 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -7,6 +7,10 @@
if SOC_INTEL_DENVERTON_NS
+config CPU_INTEL_NUM_FIT_ENTRIES + int + default 1 + config CPU_SPECIFIC_OPTIONS def_bool y select ARCH_ALL_STAGES_X86_32 @@ -21,6 +25,7 @@ select CACHE_MRC_SETTINGS select PARALLEL_MP select PCR_COMMON_IOSF_1_0 + select SUPPORT_CPU_UCODE_IN_CBFS select INTEL_DESCRIPTOR_MODE_CAPABLE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_CPU @@ -153,10 +158,14 @@ hex default 0x8000
-config DENVERTON_NS_CAR_NEM_ENHANCED +choice + prompt "Cache-as-ram implementation" + default USE_DENVERTON_NS_CAR_NEM_ENHANCED + help + This option allows you to select how cache-as-ram (CAR) is set up. + +config USE_DENVERTON_NS_CAR_NEM_ENHANCED bool "Enhanced Non-evict mode" - depends on !FSP_CAR - default y select SOC_INTEL_COMMON_BLOCK_CAR select USE_CAR_NEM_ENHANCED_V1 help @@ -167,4 +176,12 @@ ENHANCED NEM guarantees that modified data is always kept in cache while clean data is replaced.
+config USE_DENVERTON_NS_FSP_CAR + bool "Use FSP CAR" + select FSP_CAR + help + Use FSP APIs to initialize and tear down the Cache-As-Ram. + +endchoice + endif ## SOC_INTEL_DENVERTON_NS diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 105f866..c854037 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -2,6 +2,8 @@
ifeq ($(CONFIG_SOC_INTEL_DENVERTON_NS),y)
+cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5f-01 + subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic