Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38192 )
Change subject: drivers/pc80/rtc: Separate {get|set}_option() prototypes ......................................................................
drivers/pc80/rtc: Separate {get|set}_option() prototypes
Long-term plan is to support loading runtime configuration from SPI flash as an alternative, so move these prototypes outside pc80/.
Change-Id: Iad7b03dc985550da903d56b3deb5bd736013f8f1 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38192 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/cpu/intel/hyperthreading/intel_sibling.c M src/drivers/pc80/rtc/mc146818rtc.c M src/ec/kontron/it8516e/ec.c M src/ec/lenovo/h8/h8.c M src/ec/lenovo/pmh7/pmh7.c M src/include/option.h M src/include/pc80/mc146818rtc.h M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/getac/p470/early_init.c M src/mainboard/ibase/mb899/superio_hwm.c M src/mainboard/kontron/986lcd-m/early_init.c M src/mainboard/kontron/986lcd-m/mainboard.c M src/mainboard/kontron/ktqm77/mainboard.c M src/mainboard/lenovo/x60/smihandler.c M src/mainboard/roda/rk886ex/early_init.c M src/northbridge/intel/gm45/igd.c M src/northbridge/intel/i945/early_init.c M src/northbridge/intel/i945/gma.c M src/northbridge/intel/nehalem/raminit.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/sandybridge/early_init.c M src/northbridge/intel/x4x/early_init.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/broadwell/smihandler.c M src/soc/intel/common/block/pmc/pmclib.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/bd82x6x/sata.c M src/southbridge/intel/common/smihandler.c M src/southbridge/intel/i82801dx/lpc.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801ix/sata.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/i82801jx/sata.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/ibexpeak/sata.c M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/smihandler.c M src/superio/ite/it8720f/superio.c M src/superio/nuvoton/nct5572d/superio.c M src/superio/winbond/w83627ehg/superio.c M src/superio/winbond/w83627hf/superio.c M src/superio/winbond/w83667hg-a/superio.c 43 files changed, 72 insertions(+), 50 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c index f5bcc87..f602ccd 100644 --- a/src/cpu/intel/hyperthreading/intel_sibling.c +++ b/src/cpu/intel/hyperthreading/intel_sibling.c @@ -15,7 +15,7 @@ #include <cpu/x86/lapic.h> #include <cpu/intel/hyperthreading.h> #include <device/device.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <smp/spinlock.h>
#if CONFIG(PARALLEL_CPU_INIT) diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c index 715e440..ee61a6c 100644 --- a/src/drivers/pc80/rtc/mc146818rtc.c +++ b/src/drivers/pc80/rtc/mc146818rtc.c @@ -17,6 +17,7 @@ #include <fallback.h> #include <version.h> #include <console/console.h> +#include <option.h> #include <pc80/mc146818rtc.h> #include <rtc.h> #include <string.h> @@ -251,7 +252,7 @@ return CB_SUCCESS; }
-enum cb_err get_option(void *dest, const char *name) +enum cb_err cmos_get_option(void *dest, const char *name) { struct cmos_option_table *ct; struct region_device rdev; @@ -344,7 +345,7 @@ return CB_SUCCESS; }
-enum cb_err set_option(const char *name, void *value) +enum cb_err cmos_set_option(const char *name, void *value) { struct cmos_option_table *ct; struct region_device rdev; diff --git a/src/ec/kontron/it8516e/ec.c b/src/ec/kontron/it8516e/ec.c index c0042fc..ca695b3 100644 --- a/src/ec/kontron/it8516e/ec.c +++ b/src/ec/kontron/it8516e/ec.c @@ -17,7 +17,7 @@ #include <device/device.h> #include <device/pnp.h> #include <ec/acpi/ec.h> -#include <pc80/mc146818rtc.h> +#include <option.h>
#include "ec.h" #include "chip.h" diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c index 93a771c..73657bc 100644 --- a/src/ec/lenovo/h8/h8.c +++ b/src/ec/lenovo/h8/h8.c @@ -20,7 +20,7 @@ #include <ec/acpi/ec.h> #include <string.h> #include <smbios.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <pc80/keyboard.h> #include <types.h>
diff --git a/src/ec/lenovo/pmh7/pmh7.c b/src/ec/lenovo/pmh7/pmh7.c index 9dd668f..42e5238 100644 --- a/src/ec/lenovo/pmh7/pmh7.c +++ b/src/ec/lenovo/pmh7/pmh7.c @@ -17,7 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pnp.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <delay.h> #include <types.h>
diff --git a/src/include/option.h b/src/include/option.h index 3a20dcf..198ca00 100644 --- a/src/include/option.h +++ b/src/include/option.h @@ -1,19 +1,38 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + #ifndef _OPTION_H_ #define _OPTION_H_
-/* - * FIXME: get_option() needs to be abstracted better so that other non-volatile - * storage can be used. This will benefit machines without CMOS as well as those - * without a battery-backed CMOS (e.g. some laptops). - */ -#if CONFIG(USE_OPTION_TABLE) -#include <pc80/mc146818rtc.h> -#else #include <types.h> -static inline enum cb_err get_option(void *dest, const char *name) + +enum cb_err cmos_set_option(const char *name, void *val); +enum cb_err cmos_get_option(void *dest, const char *name); + +static inline enum cb_err set_option(const char *name, void *val) { + if (CONFIG(USE_OPTION_TABLE)) + return cmos_set_option(name, val); + return CB_CMOS_OTABLE_DISABLED; } -#endif + +static inline enum cb_err get_option(void *dest, const char *name) +{ + if (CONFIG(USE_OPTION_TABLE)) + return cmos_get_option(dest, name); + + return CB_CMOS_OTABLE_DISABLED; +}
#endif /* _OPTION_H_ */ diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 91413d1..9cd00b5 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -181,9 +181,6 @@ int cmos_checksum_valid(int range_start, int range_end, int cks_loc); void cmos_set_checksum(int range_start, int range_end, int cks_loc);
-enum cb_err set_option(const char *name, void *val); -enum cb_err get_option(void *dest, const char *name); - #if CONFIG(CMOS_POST) #if CONFIG(USE_OPTION_TABLE) # include "option_table.h" diff --git a/src/mainboard/asus/am1i-a/BiosCallOuts.c b/src/mainboard/asus/am1i-a/BiosCallOuts.c index ce54741..a61a722 100644 --- a/src/mainboard/asus/am1i-a/BiosCallOuts.c +++ b/src/mainboard/asus/am1i-a/BiosCallOuts.c @@ -22,7 +22,7 @@ #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> #include <stdlib.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <types.h>
const BIOS_CALLOUT_STRUCT BiosCallouts[] = diff --git a/src/mainboard/getac/p470/early_init.c b/src/mainboard/getac/p470/early_init.c index 0581f80..f4f974a 100644 --- a/src/mainboard/getac/p470/early_init.c +++ b/src/mainboard/getac/p470/early_init.c @@ -20,7 +20,7 @@ #include <delay.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <console/console.h> #include <northbridge/intel/i945/i945.h> #include <southbridge/intel/i82801gx/i82801gx.h> diff --git a/src/mainboard/ibase/mb899/superio_hwm.c b/src/mainboard/ibase/mb899/superio_hwm.c index 175c9a0..f57a06d 100644 --- a/src/mainboard/ibase/mb899/superio_hwm.c +++ b/src/mainboard/ibase/mb899/superio_hwm.c @@ -17,7 +17,7 @@ #include <types.h> #include <console/console.h> #include <device/device.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <superio/hwm5_conf.h> #include <superio/nuvoton/common/hwm.h>
diff --git a/src/mainboard/kontron/986lcd-m/early_init.c b/src/mainboard/kontron/986lcd-m/early_init.c index 995a346..827f792 100644 --- a/src/mainboard/kontron/986lcd-m/early_init.c +++ b/src/mainboard/kontron/986lcd-m/early_init.c @@ -17,7 +17,7 @@ #include <device/pci_ops.h> #include <device/pnp_ops.h> #include <device/pnp_def.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <northbridge/intel/i945/i945.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <superio/winbond/common/winbond.h> diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c index cc2e32b..30368e8 100644 --- a/src/mainboard/kontron/986lcd-m/mainboard.c +++ b/src/mainboard/kontron/986lcd-m/mainboard.c @@ -18,7 +18,7 @@ #include <device/device.h> #include <console/console.h> #include <drivers/intel/gma/int15.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <superio/hwm5_conf.h> #include <superio/nuvoton/common/hwm.h>
diff --git a/src/mainboard/kontron/ktqm77/mainboard.c b/src/mainboard/kontron/ktqm77/mainboard.c index 50a7b6b..2af5eb2 100644 --- a/src/mainboard/kontron/ktqm77/mainboard.c +++ b/src/mainboard/kontron/ktqm77/mainboard.c @@ -22,7 +22,7 @@ #if CONFIG(VGA_ROM_RUN) #include <x86emu/x86emu.h> #endif -#include <pc80/mc146818rtc.h> +#include <option.h> #include <arch/interrupt.h> #include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/x60/smihandler.c b/src/mainboard/lenovo/x60/smihandler.c index 7aacc45..d5c92e5 100644 --- a/src/mainboard/lenovo/x60/smihandler.c +++ b/src/mainboard/lenovo/x60/smihandler.c @@ -21,7 +21,7 @@ #include <southbridge/intel/i82801gx/nvs.h> #include <southbridge/intel/common/pmutil.h> #include <ec/acpi/ec.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <ec/lenovo/h8/h8.h> #include <delay.h> #include "dock.h" diff --git a/src/mainboard/roda/rk886ex/early_init.c b/src/mainboard/roda/rk886ex/early_init.c index efecb0d..b0d08f4 100644 --- a/src/mainboard/roda/rk886ex/early_init.c +++ b/src/mainboard/roda/rk886ex/early_init.c @@ -21,7 +21,7 @@ #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <northbridge/intel/i945/i945.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <superio/smsc/lpc47n227/lpc47n227.h> diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c index b1ce1be..cfd067e 100644 --- a/src/northbridge/intel/gm45/igd.c +++ b/src/northbridge/intel/gm45/igd.c @@ -19,7 +19,7 @@ #include <device/pci_ops.h> #include <device/pci_def.h> #include <console/console.h> -#include <pc80/mc146818rtc.h> +#include <option.h>
#include "gm45.h"
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 6e650eb..1deca3e 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -21,7 +21,7 @@ #include <device/pci_def.h> #include <cbmem.h> #include <romstage_handoff.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <types.h>
#include "i945.h" diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index d08b77d..98e30e7 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -22,7 +22,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <edid.h> #include <drivers/intel/gma/edid.h> #include <drivers/intel/gma/i915.h> diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 215e9b8..7735522 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -24,7 +24,7 @@ #include <cbmem.h> #include <cf9_reset.h> #include <ip_checksum.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <device/pci_def.h> #include <device/device.h> #include <halt.h> diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index b5c5ee0..c3cd380 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -20,7 +20,7 @@ #include <device/pci.h> #include <northbridge/intel/pineview/pineview.h> #include <northbridge/intel/pineview/chip.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <types.h>
#define LPC PCI_DEV(0, 0x1f, 0) diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index 95fc52d..74ae4f5 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -21,7 +21,7 @@ #include <device/device.h> #include <device/pci_ops.h> #include <device/pci_def.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <romstage_handoff.h> #include <types.h>
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index c9d44fc..3520b88 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -22,7 +22,7 @@ #else #include <southbridge/intel/i82801jx/i82801jx.h> /* DEFAULT_PMBASE */ #endif -#include <pc80/mc146818rtc.h> +#include <option.h> #include "x4x.h" #include <console/console.h> #include <romstage_handoff.h> diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 007b56b..e86b5bd 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -18,7 +18,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c index c2843a7..5b04f79 100644 --- a/src/soc/intel/broadwell/smihandler.c +++ b/src/soc/intel/broadwell/smihandler.c @@ -27,7 +27,7 @@ #include <spi-generic.h> #include <elog.h> #include <halt.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <soc/lpc.h> #include <soc/nvs.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index 82b391b..d022666 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -21,7 +21,7 @@ #include <intelblocks/pmclib.h> #include <intelblocks/gpio.h> #include <intelblocks/tco.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <soc/pm.h> #include <stdint.h> #include <string.h> diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index ef66ca5..01576a6 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -20,7 +20,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/pci_def.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c index 3ec065f..f5243f6 100644 --- a/src/southbridge/intel/bd82x6x/sata.c +++ b/src/southbridge/intel/bd82x6x/sata.c @@ -20,7 +20,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <acpi/sata.h> #include <types.h>
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index 7f376fd..9fba12f 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -25,7 +25,7 @@ #include <cpu/intel/em64t101_save_state.h> #include <elog.h> #include <halt.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <southbridge/intel/common/pmbase.h> #include <smmstore.h>
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index a46f5a3..0e2aead 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -22,6 +22,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <option.h> #include <pc80/mc146818rtc.h> #include <pc80/isa-dma.h> #include <arch/io.h> diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 0330af0..779d319 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -18,6 +18,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <option.h> #include <pc80/mc146818rtc.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index d541730..bac48c2 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -19,6 +19,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <option.h> #include <pc80/mc146818rtc.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c index fcf4045..546acdf 100644 --- a/src/southbridge/intel/i82801ix/sata.c +++ b/src/southbridge/intel/i82801ix/sata.c @@ -22,7 +22,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <types.h>
#include "chip.h" diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index a594452..91b1bde 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -19,6 +19,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <option.h> #include <pc80/mc146818rtc.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c index e6e08a3..ce8ae47 100644 --- a/src/southbridge/intel/i82801jx/sata.c +++ b/src/southbridge/intel/i82801jx/sata.c @@ -22,7 +22,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <types.h>
#include "chip.h" diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 324438e..851f4f5 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -19,6 +19,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <option.h> #include <pc80/mc146818rtc.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c index 2d9412a..04e0564 100644 --- a/src/southbridge/intel/ibexpeak/sata.c +++ b/src/southbridge/intel/ibexpeak/sata.c @@ -21,7 +21,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <acpi/sata.h> #include <types.h>
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 62d8aa6..4b39829 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -20,7 +20,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 61f86fb..72c3447 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -25,7 +25,7 @@ #include <cpu/intel/em64t101_save_state.h> #include <elog.h> #include <halt.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <southbridge/intel/common/finalize.h> #include <northbridge/intel/haswell/haswell.h> #include <cpu/intel/haswell/haswell.h> diff --git a/src/superio/ite/it8720f/superio.c b/src/superio/ite/it8720f/superio.c index 48bbfb2..b5198e7 100644 --- a/src/superio/ite/it8720f/superio.c +++ b/src/superio/ite/it8720f/superio.c @@ -18,7 +18,7 @@ #include <device/device.h> #include <device/pnp.h> #include <pc80/keyboard.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <superio/ite/common/env_ctrl.h> #include <superio/conf_mode.h> #include <types.h> diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c index 76c983a..163d6b9 100644 --- a/src/superio/nuvoton/nct5572d/superio.c +++ b/src/superio/nuvoton/nct5572d/superio.c @@ -20,7 +20,7 @@ #include <device/device.h> #include <device/pnp.h> #include <pc80/keyboard.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <arch/acpi.h> #include <superio/conf_mode.h>
diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index da50173..35fca01 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -23,7 +23,7 @@ #include <superio/hwm5_conf.h> #include <console/console.h> #include <pc80/keyboard.h> -#include <pc80/mc146818rtc.h> +#include <option.h>
#include "w83627ehg.h"
diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index a4d734f..4d76052 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -23,7 +23,7 @@ #include <superio/hwm5_conf.h> #include <console/console.h> #include <pc80/keyboard.h> -#include <pc80/mc146818rtc.h> +#include <option.h>
#include "w83627hf.h"
diff --git a/src/superio/winbond/w83667hg-a/superio.c b/src/superio/winbond/w83667hg-a/superio.c index 69ab91b..d0f4eef 100644 --- a/src/superio/winbond/w83667hg-a/superio.c +++ b/src/superio/winbond/w83667hg-a/superio.c @@ -20,7 +20,7 @@ #include <device/device.h> #include <device/pnp.h> #include <pc80/keyboard.h> -#include <pc80/mc146818rtc.h> +#include <option.h> #include <arch/acpi.h> #include <superio/conf_mode.h>