[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell: Create RMRR for iGPU

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46990 )

Change subject: nb/intel/haswell: Create RMRR for iGPU
......................................................................

nb/intel/haswell: Create RMRR for iGPU

Taken from Broadwell.

Change-Id: I246fdc1473bf8949073377d03622026bd3e6aafa
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/haswell/acpi.c
1 file changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/46990/1

diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index 0e7967f..f48ef61 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -63,6 +63,21 @@
    	acpi_dmar_drhd_fixup(tmp, current);
    }

+	/* Then, add RMRR entries after all DRHD entries */
+	if (emit_igd) {
+		const unsigned long tmp = current;
+
+		const struct device *sa_dev = pcidev_on_root(0, 0);
+
+		/* Bit 0 is lock bit, not part of address */
+		const u32 tolud = pci_read_config32(sa_dev, TOLUD) & ~1;
+		const u32 bgsm  = pci_read_config32(sa_dev,  BGSM) & ~1;
+
+		current += acpi_create_dmar_rmrr(current, 0, bgsm, tolud - 1);
+		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
+		acpi_dmar_rmrr_fixup(tmp, current);
+	}
+
    return current;
 }