Attention is currently required from: Werner Zeh. Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64033 )
Change subject: mb/siemens/mc_ehl2: Set PCH TSN link speed to 1 Gbps in devicetree ......................................................................
mb/siemens/mc_ehl2: Set PCH TSN link speed to 1 Gbps in devicetree
TSN runs in SGMII mode on this mainboard. This requires setting the link speed to 1 Gbps.
Change-Id: I9f1da971b4de5671d6d38be6dbc50edbbe20d157 Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/64033/1
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 72e4b0f..f74b504 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -101,7 +101,7 @@ }"
# TSN GBE related UPDs - register "PchTsnGbeLinkSpeed" = "Tsn_2_5_Gbps" + register "PchTsnGbeLinkSpeed" = "Tsn_1_Gbps" register "PchTsnGbeSgmiiEnable" = "1" register "PseTsnGbeSgmiiEnable[0]" = "1" register "PseTsnGbeSgmiiEnable[1]" = "1"