[coreboot-gerrit] [M] Change in coreboot[main]: soc/intel/meteorlake: Hook up Pch Sleep Assertion widths

[Sean Rhodes (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Sean Rhodes, Subrata Banik, Tarun.

Hello Angel Pons, Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Matt DeVillier, Subrata Banik, Tarun, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/86754?usp=email

to look at the new patch set (#5).

Change subject: soc/intel/meteorlake: Hook up Pch Sleep Assertion widths
......................................................................

soc/intel/meteorlake: Hook up Pch Sleep Assertion widths

Hook up devicetree to the assertion width UPDs, in the same way
that Alder Lake does - specifically, having a default value if
none is provided as to not depend on FSP.

Change-Id: Ifd92ef8217055eb7b558bc494a6586b35403c368
Signed-off-by: Sean Rhodes 
---
M src/soc/intel/meteorlake/chip.h
M src/soc/intel/meteorlake/fsp_params.c
2 files changed, 81 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/86754/5