Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33993 )
Change subject: mainboard/amd: Add padmelon board code ......................................................................
Patch Set 7:
(6 comments)
https://review.coreboot.org/c/coreboot/+/33993/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/33993/3//COMMIT_MSG@11 PS3, Line 11: This code was intended for : merlinfalcon version, but as there are some legal issues (documentation) : blocking its merge to coreboot, it'll be released for 00670F00,
For a while I physically had both versions of padmelon. […]
Why not simply say this is for the 670F00 version? As I mentioned before, just describe what this patch does.
https://review.coreboot.org/c/coreboot/+/33993/3//COMMIT_MSG@17 PS3, Line 17:
Partially from Marc's work and partially from AMD's gardenia.
Please note it somewhere. Preferably in the commit message.
https://review.coreboot.org/c/coreboot/+/33993/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/33993/7//COMMIT_MSG@15 PS7, Line 15: actual filler word. doesn't add any information here.
https://review.coreboot.org/c/coreboot/+/33993/7//COMMIT_MSG@15 PS7, Line 15: a SIO, fintek f81803a through a Fintek F81803A SIO.
https://review.coreboot.org/c/coreboot/+/33993/7//COMMIT_MSG@18 PS7, Line 18: Both versions tested and boot to Linux using SeaBIOS I'm confused. Does this support all versions of Family 15h Models 60h-6Fh? Just that the blobs aren't present? If that's the case, then reword the body of the commit message to remove all the stuff about "This code was intended for merlinfalcon version, but as there are some legal issues (documentation) blocking its merge to coreboot, it'll be released for 00670F00, being replaced later with merlinfalcon when the binaries can be merged to coreboot (PSP, video and AGESA)."
https://review.coreboot.org/c/coreboot/+/33993/3/src/mainboard/amd/padmelon/... File src/mainboard/amd/padmelon/gpio.c:
https://review.coreboot.org/c/coreboot/+/33993/3/src/mainboard/amd/padmelon/... PS3, Line 29: onst struct soc_amd_gpio gpio_set_stage_reset[] = { : /* NFC PU */ : PAD_GPO(GPIO_64, HIGH), : /* PCIe presence detect */ : PAD_GPO(GPIO_64, HIGH), : /* MUX for Power Express Eval */ : PAD_GPI(GPIO_116, PULL_DOWN), : /* SD power */ : PAD_GPO(GPIO_64, HIGH), : }; : : const struct soc_amd_gpio gpio_set_stage_ram[] = { : /* BT radio disable */ : PAD_GPO(GPIO_14, HIGH), : /* NFC wake */ : PAD_GPO(GPIO_65, HIGH), : /* Webcam */ : PAD_GPO(GPIO_66, HIGH), : /* GPS sleep */ : PAD_GPO(GPIO_70, HIGH), : }
As good as I could make based on Marc's work. I have not double check against schematic though.
Please update correctly, or note that this patch is work in progress.