Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32050
Change subject: soc/apl: Add C-States configuration options ......................................................................
soc/apl: Add C-States configuration options
FSP-S options: - C1e - PkgCStateLimit - CStateAutoDemotion - CStateUnDemotion - PkgCStateDemotion - PkgCStateUnDemotion
Change-Id: I2ac16aa896fc851378cc049aaf385573e3a69320 Signed-off-by: Felix Singer felix.singer@9elements.com --- M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/chip.h 2 files changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/32050/1
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 30a537b..15f2ba8 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -741,6 +741,13 @@ /* Disable FSP from locking access to the RTC NVRAM */ silconfig->RtcLock = 0;
+ silconfig->C1e = cfg->c1e; + silconfig->PkgCStateLimit = cfg->pkg_cstate_limit; + silconfig->CStateAutoDemotion = cfg->cstate_auto_demotion; + silconfig->CStateUnDemotion = cfg->cstate_undemotion; + silconfig->PkgCStateDemotion = cfg->pkg_cstate_demotion; + silconfig->PkgCStateUnDemotion = cfg->pkg_cstate_undemotion; + /* Enable Audio clk gate and power gate */ silconfig->HDAudioClkGate = cfg->hdaudio_clk_gate_enable; silconfig->HDAudioPwrGate = cfg->hdaudio_pwr_gate_enable; diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index b9e368c..6015acf 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -120,6 +120,13 @@ /* PL2 override value in mW for APL */ uint16_t tdp_pl2_override_mw;
+ uint8_t c1e; + uint8_t pkg_cstate_limit; + uint8_t cstate_auto_demotion; + uint8_t cstate_undemotion; + uint8_t pkg_cstate_demotion; + uint8_t pkg_cstate_undemotion; + /* Configure Audio clk gate and power gate * IOSF-SB port ID 92 offset 0x530 [5] and [3] */