[coreboot-gerrit] Change in coreboot[master]: mb/ocp/deltalake: Override uart base address via VPD variable

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45408 )

Change subject: mb/ocp/deltalake: Override uart base address via VPD variable
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mb/ocp/deltalake: Override uart base address via VPD variable

Use VPD of "coreboot_uart_io" to select uart io if
OVERRIDE_UART_FOR_CONSOLE is selected.

Tested=On OCP Delta Lake, console messages correctly output to uart
port which is defined in VPD.

Signed-off-by: Bryant Ou 
Change-Id: I55a85d6f137ef1aba95466e7b094740b685bf9bd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45408
Tested-by: build bot (Jenkins) 
Reviewed-by: Jonathan Zhang 
---
M src/mainboard/ocp/deltalake/Kconfig
M src/mainboard/ocp/deltalake/Makefile.inc
M src/mainboard/ocp/deltalake/romstage.c
A src/mainboard/ocp/deltalake/uartio_vpd.c
M src/mainboard/ocp/deltalake/vpd.h
5 files changed, 30 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Jonathan Zhang: Looks good to me, approved

diff --git a/src/mainboard/ocp/deltalake/Kconfig b/src/mainboard/ocp/deltalake/Kconfig
index c439dca..b92bd96 100644
--- a/src/mainboard/ocp/deltalake/Kconfig
+++ b/src/mainboard/ocp/deltalake/Kconfig
@@ -16,6 +16,7 @@
    select IPMI_OCP
    select MAINBOARD_HAS_LPC_TPM
    select MAINBOARD_HAS_TPM2
+	select OVERRIDE_UART_FOR_CONSOLE

config UART_FOR_CONSOLE
    int
diff --git a/src/mainboard/ocp/deltalake/Makefile.inc b/src/mainboard/ocp/deltalake/Makefile.inc
index e961a34..7a92e93 100644
--- a/src/mainboard/ocp/deltalake/Makefile.inc
+++ b/src/mainboard/ocp/deltalake/Makefile.inc
@@ -8,5 +8,6 @@
 ramstage-y += ramstage.c ipmi.c
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 all-$(CONFIG_CONSOLE_OVERRIDE_LOGLEVEL) += loglevel_vpd.c
+all-$(CONFIG_OVERRIDE_UART_FOR_CONSOLE) += uartio_vpd.c
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
 CPPFLAGS_common += -I$(CONFIG_FSP_HEADER_PATH)
diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c
index f833715..4272e3a 100644
--- a/src/mainboard/ocp/deltalake/romstage.c
+++ b/src/mainboard/ocp/deltalake/romstage.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <console/console.h>
+#include <console/uart.h>
 #include <drivers/ipmi/ipmi_kcs.h>
 #include <drivers/ipmi/ocp/ipmi_ocp.h>
 #include <drivers/vpd/vpd.h>
@@ -29,7 +30,10 @@
    		"SerialIoUartDebugEnable to %d\n", FSP_LOG, FSP_LOG_DEFAULT);
    	mupd->FspmConfig.SerialIoUartDebugEnable = FSP_LOG_DEFAULT;
    }
-	mupd->FspmConfig.SerialIoUartDebugIoBase = 0x2f8;
+
+	/* Select UART IO of FSP */
+	static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
+	mupd->FspmConfig.SerialIoUartDebugIoBase = bases[get_uart_for_console()];

if (mupd->FspmConfig.SerialIoUartDebugEnable) {
    	/* FSP debug log level */
diff --git a/src/mainboard/ocp/deltalake/uartio_vpd.c b/src/mainboard/ocp/deltalake/uartio_vpd.c
new file mode 100644
index 0000000..e7689f5
--- /dev/null
+++ b/src/mainboard/ocp/deltalake/uartio_vpd.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <drivers/vpd/vpd.h>
+#include <console/uart.h>
+#include <string.h>
+
+#include "vpd.h"
+
+unsigned int get_uart_for_console(void)
+{
+	int val_int;
+
+	if (vpd_get_int(COREBOOT_UART_IO, VPD_RW_THEN_RO, (int *const) &val_int)) {
+		if (val_int > 3)
+			val_int = COREBOOT_UART_IO_DEFAULT;
+	}
+	return val_int;
+}
diff --git a/src/mainboard/ocp/deltalake/vpd.h b/src/mainboard/ocp/deltalake/vpd.h
index 82989ff..55cbc5e 100644
--- a/src/mainboard/ocp/deltalake/vpd.h
+++ b/src/mainboard/ocp/deltalake/vpd.h
@@ -37,4 +37,8 @@
 #define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark"
 #define FSPM_MEMREFRESHWATERMARK_DEFAULT 1

+/* coreboot uart io select: 0 = 0x3f8, 1 = 0x2f8, 2 = 0x3e8, 3 = 0x2e8 */
+#define COREBOOT_UART_IO "coreboot_uart_io"
+#define COREBOOT_UART_IO_DEFAULT 1
+
 #endif