[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Pass more SPI options to FSP.

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32791 )

Change subject: soc/intel/cannonlake: Pass more SPI options to FSP.
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Patch Set 1:
> Patch Set 1:
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> (1 comment)
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> These settings are just tweaking configuration int he designware ip block, no? Why are we putting in code to feed this into FSP when we already have code which configures everything?

Unfortunately, FSP ends up configuring these based on the default values in the UPDs. Ideally, FSP should not configure any of this. But currently there is no option to say skip all this programming.