Werner Zeh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31195 )
Change subject: mb/siemens/mc_apl1: Enable VTD for mc_apl2 and mc_apl5 ......................................................................
mb/siemens/mc_apl1: Enable VTD for mc_apl2 and mc_apl5
These boards need a working VTD therefore enable this feature.
Change-Id: I74c64bf1bd66188c4c32b85c66683dafd0e1fd38 Signed-off-by: Werner Zeh werner.zeh@siemens.com Reviewed-on: https://review.coreboot.org/c/31195 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb 2 files changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Mario Scheithauer: Looks good to me, approved
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index c362e6c..7a0b886 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -47,6 +47,9 @@ # 0:HS400(Default), 1:HS200, 2:DDR50 register "emmc_host_max_speed" = "2"
+ # Enable Vtd feature + register "enable_vtd" = "1" + device domain 0 on device pci 00.0 on end # - Host Bridge device pci 00.1 off end # - DPTF diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb index dfdfd55..989ab45 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb @@ -46,6 +46,9 @@ # 0:HS400(Default), 1:HS200, 2:DDR50 register "emmc_host_max_speed" = "2"
+ # Enable Vtd feature + register "enable_vtd" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value |