Attention is currently required from: V Sowmya, Martin Roth, Tim Wawrzynczak, Angel Pons, Balaji Manigandan. Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49732 )
Change subject: mb/intel/shadowmountain: Add the ramstage code ......................................................................
Patch Set 6:
(5 comments)
File src/mainboard/intel/shadowmountain/Kconfig:
https://review.coreboot.org/c/coreboot/+/49732/comment/f865a5ec_29e8743b PS6, Line 6: DRIVERS_I2C_MAX98373 nit: order
File src/mainboard/intel/shadowmountain/mainboard.c:
https://review.coreboot.org/c/coreboot/+/49732/comment/ad613dfb_9a00cead PS6, Line 9: #include <smbios.h> : #include <stdint.h> : #include <string.h> needed?
https://review.coreboot.org/c/coreboot/+/49732/comment/95506cbf_dd2e5542 PS6, Line 24: if (CONFIG(EC_GOOGLE_CHROMEEC)) I think we do not need this check, since chrome ec is implicitly on SM
File src/mainboard/intel/shadowmountain/smihandler.c:
https://review.coreboot.org/c/coreboot/+/49732/comment/7b3292dc_37bf2fd3 PS6, Line 10: if (!CONFIG(EC_GOOGLE_CHROMEEC)) : return; I think we do not need this check, since chrome ec is implicitly on SM
File src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/49732/comment/04980482_7a75a277 PS6, Line 23: consistent tabs?