Leroy P Leahy (leroy.p.leahy@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14111
-gerrit
commit 925172602a481ffe92734afcab5007e687cc788f Author: Lee Leahy leroy.p.leahy@intel.com Date: Wed Mar 16 10:21:59 2016 -0700
coreboot_tables: Extend serial port description
Extend the serial port description to include the input clock frequency and an identifier for the serial port.
Without the input frequency it is impossible for the payload to compute the baud-rate divisor without making an assumption about the frequency. This breaks down when the UART is able to support multiple input clock frequencies.
Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file: * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate UEFIPAYLOAD.fd * Load the SPI driver stack * Testing is successful when CorebootPayloadPkg is able to properly initialize the serial port without using built-in values.
Change-Id: I05a7e864afcd930916658e3efed53ff2efd403ec Signed-off-by: Lee Leahy leroy.p.leahy@intel.com --- payloads/libpayload/include/coreboot_tables.h | 2 ++ src/commonlib/include/commonlib/coreboot_tables.h | 2 ++ src/drivers/uart/Kconfig | 13 +++++++++++++ src/drivers/uart/oxpcie_early.c | 11 +++++++++++ src/drivers/uart/pl011.c | 2 ++ src/drivers/uart/uart8250io.c | 2 ++ src/drivers/uart/uart8250mem.c | 14 +++++++++++++- src/include/console/uart.h | 1 - src/lib/coreboot_table.c | 2 ++ src/soc/intel/quark/Kconfig | 10 ++++++++++ src/soc/intel/quark/uart_common.c | 7 ++----- 11 files changed, 59 insertions(+), 7 deletions(-)
diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index 276f25f..06d1768 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -121,6 +121,8 @@ struct cb_serial { u32 baseaddr; u32 baud; u32 regwidth; + u32 input_hertz; + u32 id; };
#define CB_TAG_CONSOLE 0x00010 diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index 5c28791..3839028 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -173,6 +173,8 @@ struct lb_serial { uint32_t baseaddr; uint32_t baud; uint32_t regwidth; + uint32_t input_hertz; + uint32_t id; };
#define LB_TAG_CONSOLE 0x0010 diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index f4ad011..2a17893 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -41,3 +41,16 @@ config DRIVERS_UART_PL011 bool default n select HAVE_UART_SPECIAL + +config UART_INPUT_CLOCK_HERTZ + int + default 0 + help + UART divider's input clock frequency + +config UART_DEVICE_ID + hex + default 0 + help + ID to help the payload identify the proper UART + diff --git a/src/drivers/uart/oxpcie_early.c b/src/drivers/uart/oxpcie_early.c index eb91d31..0f322f7 100644 --- a/src/drivers/uart/oxpcie_early.c +++ b/src/drivers/uart/oxpcie_early.c @@ -85,6 +85,15 @@ void oxford_remap(u32 new_base) uart0_base = new_base + 0x1000; }
+/* Return the clock frequency UART uses as reference clock for + * baudrate generator. */ +static inline unsigned int uart_divisor_clock(void) +{ + if (CONFIG_UART_INPUT_CLOCK_HERTZ) + return CONFIG_UART_INPUT_CLOCK_HERTZ; + return uart_platform_refclk(); +} + void uart_fill_lb(void *data) { struct lb_serial serial; @@ -92,6 +101,8 @@ void uart_fill_lb(void *data) serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); serial.regwidth = 1; + serial.input_hertz = uart_divisor_clock(); + serial.id = CONFIG_UART_DEVICE_ID; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index aa55c68..8f51f18 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -48,6 +48,8 @@ void uart_fill_lb(void *data) serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); serial.regwidth = 1; + serial.input_hertz = CONFIG_UART_INPUT_CLOCK_HERTZ; + serial.id = CONFIG_UART_DEVICE_ID; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index 63bc42f..3a65b90 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -139,6 +139,8 @@ void uart_fill_lb(void *data) serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); serial.regwidth = 1; + serial.input_hertz = CONFIG_UART_INPUT_CLOCK_HERTZ; + serial.id = CONFIG_UART_DEVICE_ID; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data); diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c index 278ddb8..61ff817 100644 --- a/src/drivers/uart/uart8250mem.c +++ b/src/drivers/uart/uart8250mem.c @@ -110,6 +110,15 @@ static void uart8250_mem_init(void *base, unsigned divisor) uart8250_write(base, UART8250_LCR, CONFIG_TTYS0_LCS); }
+/* Return the clock frequency UART uses as reference clock for + * baudrate generator. */ +static inline unsigned int uart_divisor_clock(void) +{ + if (CONFIG_UART_INPUT_CLOCK_HERTZ) + return CONFIG_UART_INPUT_CLOCK_HERTZ; + return uart_platform_refclk(); +} + void uart_init(int idx) { void *base = uart_platform_baseptr(idx); @@ -117,7 +126,8 @@ void uart_init(int idx) return;
unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); + div = uart_baudrate_divisor(default_baudrate(), uart_divisor_clock(), + 16); uart8250_mem_init(base, div); }
@@ -156,6 +166,8 @@ void uart_fill_lb(void *data) serial.regwidth = sizeof(uint32_t); else serial.regwidth = sizeof(uint8_t); + serial.input_hertz = uart_divisor_clock(); + serial.id = CONFIG_UART_DEVICE_ID; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/include/console/uart.h b/src/include/console/uart.h index 8458086..24a8d4b 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -35,7 +35,6 @@ unsigned int default_baudrate(void); unsigned int uart_baudrate_divisor(unsigned int baudrate, unsigned int refclk, unsigned int oversample);
- void uart_init(int idx); void uart_tx_byte(int idx, unsigned char data); void uart_tx_flush(int idx); diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 0cfb8ac..410270c 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -117,6 +117,8 @@ void lb_add_serial(struct lb_serial *new_serial, void *data) serial->baseaddr = new_serial->baseaddr; serial->baud = new_serial->baud; serial->regwidth = new_serial->regwidth; + serial->input_hertz = new_serial->input_hertz; + serial->id = new_serial->id; }
void lb_add_console(uint16_t consoletype, void *data) diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index aab509a..8172be8 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -59,6 +59,16 @@ config TTYS0_LCS depends on ENABLE_BUILTIN_HSUART1 default 3
+config UART_INPUT_CLOCK_HERTZ + int + depends on ENABLE_BUILTIN_HSUART1 + default 44236800 + +config UART_DEVICE_ID + hex + depends on ENABLE_BUILTIN_HSUART1 + default 0x09368086 + ##### # Debug support # The following options provide debug support for the Quark coreboot diff --git a/src/soc/intel/quark/uart_common.c b/src/soc/intel/quark/uart_common.c index 4408d87..02d321d 100644 --- a/src/soc/intel/quark/uart_common.c +++ b/src/soc/intel/quark/uart_common.c @@ -16,12 +16,9 @@ */
#include <console/uart.h> +#include <device/pci_ids.h> #include <soc/iomap.h> - -unsigned int uart_platform_refclk(void) -{ - return 44236800; -} +#include <soc/pci_devs.h>
uintptr_t uart_platform_base(int idx) {