Attention is currently required from: Arthur Heymans, Patrick Rudolph. Arthur Heymans has uploaded a new patch set (#5) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/51060 )
Change subject: nb/intel/sandybridge/acpi: Support setting PCI bars above 4G ......................................................................
nb/intel/sandybridge/acpi: Support setting PCI bars above 4G
Although coreboot can allocate resources above 4G, Linux does not consider those allocation valid when there is no region above 4G in _CRS and disables the device.
TESTED: x220 with and external GPU via the expresscard slot. Linux does not touch the BARs allocated above 4G.
Change-Id: If1be9a2c1e03e5465fd3b164469511eca60edc5a Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/northbridge/intel/sandybridge/acpi/hostbridge.asl M src/northbridge/intel/sandybridge/northbridge.c 2 files changed, 50 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/51060/5