[coreboot-gerrit] Change in coreboot[master]: mb/google/brya: Update ddr config

[Subrata Banik (Code Review)]

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, EricR Lai.
Subrata Banik has uploaded a new patch set (#6) to the change originally created by EricR Lai. ( https://review.coreboot.org/c/coreboot/+/51679 )

Change subject: mb/google/brya: Update ddr config
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mb/google/brya: Update ddr config

Fixed ddr config to override the FSP default value.

BUG=b:182772421
TEST=Built image and passed memory training.

Without this change:
RcompTarget on Lpddr4x = { 40, 40, 30, 30, 30 }

With this change:
RcompTarget on Lpddr4x = { 40, 30, 30, 30, 30 }

Signed-off-by: Eric Lai 
Signed-off-by: Subrata Banik 
Change-Id: Ib07ff36496828b5de78ed928b294a400ad08865f
---
M src/mainboard/google/brya/variants/baseboard/memory.c
1 file changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/51679/6