Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39367 )
Change subject: src/soc/tigerlake: add S0ix support fsp_params
......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39367/1/src/soc/intel/tigerlake/fsp...
File src/soc/intel/tigerlake/fsp_params_tgl.c:
https://review.coreboot.org/c/coreboot/+/39367/1/src/soc/intel/tigerlake/fsp...
PS1, Line 161: if(config->s0ix_enable) {
space required before the open parenthesis '('
Done
https://review.coreboot.org/c/coreboot/+/39367/2/src/vendorcode/intel/fsp/fs...
File src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h:
PS2:
Please update Fsp headers as a separate CL. Also, Intel is using a script to generate these. […]
Done
--
To view, visit
https://review.coreboot.org/c/coreboot/+/39367
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Idf29865e80311d6ef52ea0ff2a722f8d4e845dd7
Gerrit-Change-Number: 39367
Gerrit-PatchSet: 3
Gerrit-Owner: Caveh Jalali
caveh@chromium.org
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Nick Vaccaro
nvaccaro@google.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Srinidhi N Kaushik
srinidhi.n.kaushik@intel.com
Gerrit-Reviewer: Wonkyu Kim
wonkyu.kim@intel.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Mon, 09 Mar 2020 20:58:13 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: build bot (Jenkins)
no-reply@coreboot.org
Comment-In-Reply-To: Furquan Shaikh
furquan@google.com
Gerrit-MessageType: comment