[coreboot-gerrit] Change in coreboot[master]: binaryPI: implement C bootblock

[Michał Żygowski (Code Review)]

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36914 )

Change subject: binaryPI: implement C bootblock
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Patch Set 13:

(2 comments)

Kyösti I should credit you for the BSP stack issue on C bootblock (CB:34883). Feel free to add your signoff to the commit, or I can do it if you want.

https://review.coreboot.org/c/coreboot/+/36914/8/src/drivers/amd/agesa/cache... 
File src/drivers/amd/agesa/cache_as_ram.S:

https://review.coreboot.org/c/coreboot/+/36914/8/src/drivers/amd/agesa/cache... 
PS8, Line 114: #else
> Maybe just use a different file and let the Makefile do its job?

Done

https://review.coreboot.org/c/coreboot/+/36914/8/src/drivers/amd/agesa/cache... 
PS8, Line 142: OSFXSR [
> I just noticed neither SSE nor SSE2 is selected for any AMD AGESA or binaryPI... […]

After selecting SSE2 in Kconfig, setting the FPU EM bit, OSFXSR and OSXMMEXCPT became obsolete, thus removed.