[coreboot-gerrit] Change in coreboot[master]: [NEEDTEST] soc/intel: cnl,icl,elh,jsl,tgl: enable C6DRAM

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45417 )

Change subject: [NEEDTEST] soc/intel: cnl,icl,elh,jsl,tgl: enable C6DRAM
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Patch Set 3:
> Patch Set 2:
>
> So I went back and reviewed the literature, and there have been instances on several chipsets where the c6dram feature was broken in certain ucode releases.

Ouch. Can you provide more info on that like uc versions? Is that "literature" public?
> I think this is reason enough to leave this off by default, but leave the option open in the devicetree

Then it's not good to have it in the devicetree, since the devicetree doesn't force any microcode, right?

What about adding a Kconfig (default n) instead?