[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/common/block/pcie: Allow selectable Common Clock and ASPM

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69824 )

Change subject: soc/intel/common/block/pcie: Allow selectable Common Clock and ASPM
......................................................................

soc/intel/common/block/pcie: Allow selectable Common Clock and ASPM

There is no need to enforce enabled ASPM and Common Clock on PCIe
Root Ports. ASPM can additionally introduce indeterministic latencies
and lower performance of PCIe devices. For mobile devices it may be
desirable to enable ASPM for power saving so keep the setting enabled
by default, but on desktops power is less of a concern. Desktop boards
that do not wish to enable ASPM, now will be able to disable it.

Signed-off-by: Michał Żygowski 
Change-Id: I06d7fe8e3274800e59decb9d24fd4a4208bb2b44
---
M src/soc/intel/common/block/pcie/Kconfig
1 file changed, 23 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/69824/1

diff --git a/src/soc/intel/common/block/pcie/Kconfig b/src/soc/intel/common/block/pcie/Kconfig
index 25cde37..d9d1548 100644
--- a/src/soc/intel/common/block/pcie/Kconfig
+++ b/src/soc/intel/common/block/pcie/Kconfig
@@ -1,7 +1,5 @@
 config SOC_INTEL_COMMON_BLOCK_PCIE
    bool
-	select PCIEXP_ASPM
-	select PCIEXP_COMMON_CLOCK
    help
      Intel Processor common PCIE support

@@ -9,6 +7,12 @@

source "src/soc/intel/common/block/pcie/*/Kconfig"

+config PCIEXP_ASPM
+	default y
+
+config PCIEXP_COMMON_CLOCK
+	default y
+
 config PCIEXP_CLK_PM
    default y