[coreboot-gerrit] Patch merged into coreboot/master: siemens/mc_bdx1: Set up opcode menu for SPI controller

the following patch was just integrated into master:
commit e1d6aa6e4195f5fce6cb65d39d36289e6786fa36
Author: Werner Zeh 
Date:   Wed Jul 6 11:59:10 2016 +0200

siemens/mc_bdx1: Set up opcode menu for SPI controller

Since SPI controller opcode registers are locked by FSP, they need to be
    initialized to a known good state before ReadyToBoot event and after
    every SPI flash access (e.g. for MRC cache) has been finished in order
    to enable the OS to use SPI controller without constraints.

Change-Id: I0a66344cd44e036c3999ae98d539072299cf5112
    Signed-off-by: Werner Zeh 
    Reviewed-on: https://review.coreboot.org/15547
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel 
    Reviewed-by: Stefan Reinauer

See https://review.coreboot.org/15547 for details.

-gerrit