Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/22973
Change subject: soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function ......................................................................
soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function
This patch ensures all soc function name is having _soc_ prefix in it.
TEST=Able to compile SMM common code for all supported SOC.
Change-Id: Iab1b2f51eaad87906e35dbb9e90272590974e145 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/apollolake/smihandler.c M src/soc/intel/cannonlake/smihandler.c M src/soc/intel/common/block/include/intelblocks/smihandler.h M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/skylake/smihandler.c 5 files changed, 49 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/22973/1
diff --git a/src/soc/intel/apollolake/smihandler.c b/src/soc/intel/apollolake/smihandler.c index f42ae01..5b28db2 100644 --- a/src/soc/intel/apollolake/smihandler.c +++ b/src/soc/intel/apollolake/smihandler.c @@ -22,7 +22,7 @@ #include <soc/pci_devs.h> #include <soc/pm.h>
-int smihandler_disable_busmaster(device_t dev) +int smihandler_soc_disable_busmaster(device_t dev) { if (dev == PCH_DEV_PMC) return 0; @@ -35,7 +35,7 @@ }
/* SMI handlers that should be serviced in SCI mode too. */ -uint32_t smi_handler_get_sci_mask(void) +uint32_t smihandler_soc_get_sci_mask(void) { uint32_t sci_mask = SMI_HANDLER_SCI_EN(APM_SMI_STS) | diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c index 6c57d4a..f40e81d 100644 --- a/src/soc/intel/cannonlake/smihandler.c +++ b/src/soc/intel/cannonlake/smihandler.c @@ -25,7 +25,7 @@ return &em64t101_smm_ops; }
-void smihandler_check_illegal_access(uint32_t tco_sts) +void smihandler_soc_check_illegal_access(uint32_t tco_sts) { if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM) && fast_spi_wpd_status())) @@ -46,7 +46,7 @@ }
/* SMI handlers that should be serviced in SCI mode too. */ -uint32_t smi_handler_get_sci_mask(void) +uint32_t smihandler_soc_get_sci_mask(void) { uint32_t sci_mask = SMI_HANDLER_SCI_EN(APM_STS_BIT) | diff --git a/src/soc/intel/common/block/include/intelblocks/smihandler.h b/src/soc/intel/common/block/include/intelblocks/smihandler.h index f1e3ecf..df2d17c 100644 --- a/src/soc/intel/common/block/include/intelblocks/smihandler.h +++ b/src/soc/intel/common/block/include/intelblocks/smihandler.h @@ -62,9 +62,6 @@
#define SMI_HANDLER_SCI_EN(__bit) (1 << (__bit))
-/* SMI handlers that should be serviced in SCI mode too. */ -uint32_t smi_handler_get_sci_mask(void); - /* * This function should be implemented in SOC specific code to handle * the SMI event on SLP_EN. The default functionality is provided in @@ -143,23 +140,31 @@ */ void smihandler_southbridge_espi( const struct smm_save_state_ops *save_state_ops); -/* - * This function returns a 1 or 0 depending on whether disable_busmaster - * needs to be done for the specified device on S5 entry - */ -int smihandler_disable_busmaster(device_t dev); - -/* - * SoC needs to implement the mechanism to know if an illegal attempt - * has been made to write to the BIOS area. - */ -void smihandler_check_illegal_access(uint32_t tco_sts);
/* * Returns gnvs pointer within SMM context */ struct global_nvs_t *smm_get_gnvs(void);
+/* SoC overrides. */ + +/* + * This function returns a 1 or 0 depending on whether disable_busmaster + * needs to be done for the specified device on S5 entry + */ +int smihandler_soc_disable_busmaster(device_t dev); + +/* SMI handlers that should be serviced in SCI mode too. */ +uint32_t smihandler_soc_get_sci_mask(void); + +/* + * SoC needs to implement the mechanism to know if an illegal attempt + * has been made to write to the BIOS area. + */ +void smihandler_soc_check_illegal_access(uint32_t tco_sts); + +/* Mainboard overrides. */ + /* Mainboard handler for GPI SMIs */ void mainboard_smi_gpi_handler(const struct gpi_status *sts);
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 9a4ee7c..5cf0ccd 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2013 Google Inc. - * Copyright (C) 2015-2016 Intel Corp. + * Copyright (C) 2015-2017 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -38,13 +38,13 @@
/* SoC overrides. */
-__attribute__((weak)) int smihandler_disable_busmaster(device_t dev) +__attribute__((weak)) int smihandler_soc_disable_busmaster(device_t dev) { return 1; }
/* SMI handlers that should be serviced in SCI mode too. */ -__attribute__((weak)) uint32_t smi_handler_get_sci_mask(void) +__attribute__((weak)) uint32_t smihandler_soc_get_sci_mask(void) { return 0; /* No valid SCI mask for SMI handler */ } @@ -53,11 +53,27 @@ * Needs to implement the mechanism to know if an illegal attempt * has been made to write to the BIOS area. */ -__attribute__((weak)) void smihandler_check_illegal_access(uint32_t tco_sts) +__attribute__((weak)) void smihandler_soc_check_illegal_access( + uint32_t tco_sts) { return; }
+/* Mainboard overrides. */ + +__attribute__((weak)) void mainboard_smi_gpi_handler(const struct + gpi_status *sts) +{ + return; +} + +__attribute__((weak)) void mainboard_smi_espi_handler(void) +{ + return; +} + +/* Common Functions */ + static void *find_save_state(const struct smm_save_state_ops *save_state_ops, int cmd) { @@ -112,7 +128,7 @@ u32 reg32; device_t dev = PCI_DEV(bus, slot, func);
- if (!smihandler_disable_busmaster(dev)) + if (!smihandler_soc_disable_busmaster(dev)) continue; val = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -360,7 +376,7 @@ if (!tco_sts) return;
- smihandler_check_illegal_access(tco_sts); + smihandler_soc_check_illegal_access(tco_sts);
if (tco_sts & TCO_TIMEOUT) { /* TIMEOUT */ /* Handle TCO timeout */ @@ -381,9 +397,6 @@ printk(BIOS_DEBUG, "Periodic SMI.\n"); }
-void __attribute__((weak)) -mainboard_smi_gpi_handler(const struct gpi_status *sts) { } - void smihandler_southbridge_gpi( const struct smm_save_state_ops *save_state_ops) { @@ -396,8 +409,6 @@ gpi_clear_get_smi_status(&smi_sts); }
-void __attribute__((weak)) mainboard_smi_espi_handler(void) { } - void smihandler_southbridge_espi( const struct smm_save_state_ops *save_state_ops) { @@ -419,10 +430,10 @@ /* * In SCI mode, execute only those SMI handlers that have * declared themselves as available for service in that mode - * using smi_handler_get_sci_mask. + * using smihandler_soc_get_sci_mask. */ if (pmc_read_pm1_control() & SCI_EN) - smi_sts &= smi_handler_get_sci_mask(); + smi_sts &= smihandler_soc_get_sci_mask();
if (!smi_sts) return; diff --git a/src/soc/intel/skylake/smihandler.c b/src/soc/intel/skylake/smihandler.c index 6e0054b..e402ba5 100644 --- a/src/soc/intel/skylake/smihandler.c +++ b/src/soc/intel/skylake/smihandler.c @@ -25,7 +25,7 @@ return &em64t101_smm_ops; }
-void smihandler_check_illegal_access(uint32_t tco_sts) +void smihandler_soc_check_illegal_access(uint32_t tco_sts) { if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM) && fast_spi_wpd_status())) @@ -46,7 +46,7 @@ }
/* SMI handlers that should be serviced in SCI mode too. */ -uint32_t smi_handler_get_sci_mask(void) +uint32_t smihandler_soc_get_sci_mask(void) { uint32_t sci_mask = SMI_HANDLER_SCI_EN(APM_STS_BIT) |